mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 205

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mc68hc908jw32

Manufacturer Part Number
mc68hc908jw32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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18.3.4 COP During Break Interrupts
The COP is disabled during a break interrupt when V
18.4 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-consumption standby modes.
18.4.1 Wait Mode
If enabled, the break module is active in wait mode. In the break routine, the user can subtract one from
the return address on the stack if SBSW is set. (See
the BW bit by writing logic 0 to it.
18.4.2 Stop Mode
A break interrupt causes exit from stop mode and sets the SBSW bit in the break status register.
18.5 Break Module Registers
These registers control and monitor operation of the break module:
18.5.1 Break Status and Control Register
The break status and control register (BRKSCR) contains break module enable and status bits.
BRKE — Break Enable Bit
Freescale Semiconductor
This read/write bit enables breaks on break address register matches. Clear BRKE by writing a logic
0 to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
SIM break status register (SBSR)
SIM break flag control register (SBFCR)
Address:
Reset:
Read:
Write:
Figure 18-3. Break Status and Control Register (BRKSCR)
$FE0E
BRKE
Bit 7
0
= Unimplemented
BRKA
6
0
MC68HC908JW32 Data Sheet, Rev. 5
5
0
0
4
0
0
Chapter 6 System Integration Module
TST
is present on the RST pin.
3
0
0
2
0
0
1
0
0
Bit 0
0
0
Low-Power Modes
(SIM).) Clear
205

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