mc68ec020 Freescale Semiconductor, Inc, mc68ec020 Datasheet - Page 127

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mc68ec020

Manufacturer Part Number
mc68ec020
Description
Microprocessors
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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For all exceptions other than reset, the third step is to save the current processor context.
The processor creates an exception stack frame on the active supervisor stack and fills it
with context information appropriate for the type of exception. Other information may also
be stacked, depending on which exception is being processed and the state of the
processor prior to the exception. If the exception is an interrupt and the M-bit in the SR is
set, the processor clears the M-bit and builds a second stack frame on the interrupt stack.
The last step initiates execution of the exception handler. The processor multiplies the
vector number by four to determine the exception vector offset. The processor then adds
the offset to the value stored in the VBR to obtain the memory address of the exception
vector. Next, the processor loads the PC (and the ISP for the reset exception) from the
exception vector table in memory. After prefetching the first three words to fill the
instruction pipe, the processor resumes normal processing at the address in the PC. Table
6-1 contains a description of all the exception vector offsets defined for the
MC68020/EC020.
As shown in Table 6-1, the first 64 vectors are defined by Motorola, and 192 vectors are
reserved for interrupt vectors defined by the user. However, external devices may use
vectors reserved for internal purposes at the discretion of the system designer.
6-2
M68020 USER’S MANUAL
MOTOROLA

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