mc68ec020 Freescale Semiconductor, Inc, mc68ec020 Datasheet - Page 249

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mc68ec020

Manufacturer Part Number
mc68ec020
Description
Microprocessors
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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8.2.13 Bit Manipulation Instructions
The bit manipulation instructions table indicates the number of clock periods needed for
the processor to perform the specified bit operation on the given addressing mode.
Footnotes indicate when it is necessary to add another table entry to calculate the total
effective execution time for the instruction. The total number of clock cycles is outside the
parentheses; the number of read, prefetch, and write cycles is given inside the
parentheses as (r/p/w). These cycles are included in the total clock cycle number.
*
**
MOTOROLA
**
*
**
*
**
*
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Add Fetch Effective Address Time
Add Fetch Immediate Address Time
BTST
BTST
BTST
BTST
BCHG
BCHG
BCHG
BCHG
BCLR
BCLR
BCLR
BCLR
BSET
BSET
BSET
BSET
Instruction
#<data >,Dn
Dn,Dn
#<data >,Mem
Dn,Mem
#<data >,Dn
Dn,Dn
#<data >,Mem
Dn,Mem
#<data >,Dn
Dn,Dn
#<data >,Mem
Dn,Mem
#<data >,Dn
Dn,Dn
#<data >,Mem
Dn,Mem
M68020 USER’S MANUAL
Best Case
1(0/0/0)
1(0/0/0)
4(0/0/0)
4(0/0/0)
1(0/0/0)
1(0/0/0)
4(0/0/1)
4(0/0/1)
1(0/0/0)
1(0/0/0)
4(0/0/1)
4(0/0/1)
1(0/0/0)
1(0/0/0)
4(0/0/1)
4(0/0/1)
Cache Case
4(0/0/0)
4(0/0/0)
4(0/0/0)
4(0/0/0)
4(0/0/0)
4(0/0/0)
4(0/0/1)
4(0/0/1)
4(0/0/0)
4(0/0/0)
4(0/0/1)
4(0/0/1)
4(0/0/0)
4(0/0/0)
4(0/0/1)
4(0/0/1)
Worst Case
5(0/1/0)
5(0/1/0)
5(0/1/0)
5(0/1/0)
5(0/1/0)
5(0/1/0)
5(0/1/1)
5(0/1/1)
5(0/1/0)
5(0/1/0)
5(0/1/1)
5(0/1/1)
5(0/1/0)
5(0/1/0)
5(0/1/1)
5(0/1/1)
8-35

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