mc68ec020 Freescale Semiconductor, Inc, mc68ec020 Datasheet - Page 248

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mc68ec020

Manufacturer Part Number
mc68ec020
Description
Microprocessors
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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8.2.12 Shift/Rotate Instructions
The shift/rotate instructions table indicates the number of clock periods needed for the
processor to perform the specified operation on the given addressing mode. Footnotes
indicate when it is necessary to add another table entry to calculate the total effective
execution time for the instruction. The number of bits shifted does not affect execution
time. The total number of clock cycles is outside the parentheses, the number of read,
prefetch, and write cycles is given inside the parentheses as (r/p/w). These cycles are
included in the total clock cycle number.
*
d—Direction of Shift/Rotate, L or R
8-34
*
*
*
*
*
*
*
Add Fetch Effective Address Time
LSL
LSR
LSL
LSR
LSL
LSR
ASL
ASR
ASL
ASR
ROL
ROR
ROL
ROR
ROXL
ROXR
ROXd
Instruction
Dn (Static)
Dn (Static)
Dn (Dynamic)
Dn (Dynamic)
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
Mem by 1
Dn
Dn
Mem by 1
M68020 USER’S MANUAL
Best Case
1(0/0/0)
1(0/0/0)
3(0/0/0)
3(0/0/0)
5(0/0/1)
5(0/0/1)
5(0/0/0)
3(0/0/0)
6(0/0/1)
5(0/0/1)
5(0/0/0)
5(0/0/0)
7(0/0/1)
7(0/0/1)
9(0/0/0)
9(0/0/0)
5(0/0/1)
Cache Case
12(0/0/0)
12(0/0/0)
4(0/0/0)
4(0/0/0)
6(0/0/0)
6(0/0/0)
5(0/0/1)
5(0/0/1)
8(0/0/0)
6(0/0/0)
6(0/0/1)
5(0/0/1)
8(0/0/0)
8(0/0/0)
7(0/0/1)
7(0/0/1)
5(0/0/1)
Worst Case
12(0/1/0)
12(0/1/0)
4(0/1/0)
4(0/1/0)
6(0/1/0)
6(0/1/0)
6(0/1/1)
6(0/1/1)
8(0/1/0)
6(0/1/0)
7(0/1/1)
6(0/1/1)
8(0/1/0)
8(0/1/0)
7(0/1/1)
7(0/1/1)
6(0/1/1)
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