mpc8378 Freescale Semiconductor, Inc, mpc8378 Datasheet - Page 88

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mpc8378

Manufacturer Part Number
mpc8378
Description
Powerquicc Ii Pro Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Package and Pin Listings
21.3
Figure 62
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below in
this document based on the application usage:
Note that an external AC coupling capacitor is required for the above three serial transmission protocols
with the capacitor value defined in specification of each protocol section.
22 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions.
22.1
The package parameters are provided in the following list. The package type is 31 mm × 31 mm,
689 plastic ball grid array (TePBGA II).
88
Section 8, “Ethernet: Enhanced Three-Speed Ethernet (eTSEC)”
Section 15, “PCI Express”
Section 16, “Serial ATA (SATA)”
Package outline
Interconnects
Pitch
Module height (typical)
Solder Balls
Ball diameter (typical)
SerDes Transmitter and Receiver Reference Circuits
Package Parameters for the MPC8377E TePBGA II
shows the reference circuits for SerDes data lane’s transmitter and receiver.
Transmitter
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
Figure 62. SerDes Transmitter and Receiver Reference Circuits
50 Ω
50 Ω
SD1_TX n or
SD2_TX n
SD1_TX n or
SD2_TX n
31 mm × 31 mm
1.00 mm
3.5% Ag, 96.5% Sn
689
2.0 mm to 2.46 mm (maximum)
0.60 mm
SD1_RX n or
SD2_RX n
SD1_RX n or
SD2_RX n
50 Ω
50 Ω
Receiver
Freescale Semiconductor

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