adav802 Analog Devices, Inc., adav802 Datasheet - Page 27

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adav802

Manufacturer Part Number
adav802
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
Block Reads and Writes
The ADAV802 provides the user with the ability to write to or
read from a block of registers in one continuous operation. In
SPI mode, the CLATCH line should be held low for longer than
the 16 CCLK periods to use the block read/write mode. For a
write operation, once the LSB has been clocked into the
ADAV802, on the 16th CCLK the register address as specified
by the first 7 bits of the write operation is incremented and the
next 8 bits will be clocked into the next Register Address. The
read operation is similar. Once the LSB of a read register
operation has been clocked out the Register Address is
incremented and the data from the next register will be clocked
out on the following 8 CCLKs. Figure 39 and Figure 40 show the
timing diagrams for the block write and read operations.
CLATCH
COUT
CCLK
CIN
CLATCH
CLATCH
COUT
CIN
CIN
D15
REGISTER
15
REGISTER
D14
14
8 BITS
8 BITS
ADDRESS [6:0]
13
R/W=0
R/W=1
12
11
D9
D9
Figure 37. SPI Serial Port Timing Diaram
REGISTER DATA
REGISTER DATA
Figure 39. SPI Block Write Operation
Figure 40. SPI Block Reade Operatio
Figure 38. SPI Control Word Format
10
8 BITS
8 BITS
D8
D8
Rev. Pr G | Page 27 of 53
9
R/W
8
7
REGISTER+1 DATA REGISTER+2 DATA
REGISTER+1 DATA REGISTER+2 DATA
6
DON’T CARE
8 BITS
8 BITS
5
DATA [7:0]
4
3
2
1
8 BITS
8 BITS
0
D0
D0
ADAV802

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