adav802 Analog Devices, Inc., adav802 Datasheet - Page 40

• Manufacturer Part Number: adav802
• Description: Audio Codec For Recordable Dvd
• Manufacturer: Analog Devices, Inc.

ADAV802
Table 55. NonAudio Preamble Type Register (Read Only)
ADDRESS = 0011111
DTS-CD Preamble
NonAudio Frame
NonAudio
Subframe_A
NonAudio
Subframe_B
Table 56. Receiver Channel Status Buffer
ADDRESS = 0100000 to 0110111
This is the 24 byte Receiver Channel Status Buffer. The PRO bit is stored at address location 0x20, bit 0. This buffer is read only if the channel
status is not autobuffered between the receiver and transmitter.
Table 57. Transmitter Channel Status Buffer
ADDRESS = 0111000 to 1001111
This is the 24 byte Transmitter Channel Status Buffer. The PRO bit is stored at address location 0x38, bit 0. This buffer is disabled when
autobuffering between the receiver and transmitter is enabled.
Table 58. Receiver User Bit Buffer Indirect Address Register
ADDRESS = 1010000
RxUBADDR07-00
Table 59. Receiver User Bit Buffer Data Registe
ADDRESS = 1010001
RxUBDATA07-00
Table 60. Transmitter User Bit Buffer Indirect Address Register
ADDRESS = 1010010
TxUBADDR07-00
RES
7
Will be set if the DTS-CD Preamble is detect
This bit will be set if the data received through the AES3/SPDIF Receiver is nonaudio data according to the
IEC61937 standard or nonaudio data according to SMPTE337M
This bit will be set if the data received through Channel A of the AES3/SPDIF Receiver is subframe nonaudio data
according to SMPTE337M
This bit will be set if the data received through Channel B of the AES3/SPDIF Receiver is subframe nonaudio data
according to SMPTE337M
RxUBDATA07-RxUBDATA00
7,6,5,4,3,2,1,0
A read from this register will read 8 bits of user data from the Receiver User bit buffer pointed to by
RxUBADDR7-0. This buffer can be written to when autobuffering of the user bits is enabled otherwise it is a
read only buffer
RxUBADDR07-RxUBADDR00
7,6,5,4,3,2,1,0
Indirect Address pointing to the address location in the Receiver User Bit buffer
TxUBADDR07-TxUBADDR00
7,6,5,4,3,2,1,0
Indirect Address pointing to the address location in the Transmitter User Bit buffer
TCSB7
7
RES
6
DEFAULT VALUE = 0x
RCSB7
7
RES
5
TCSB6
6
DTS-CD
RES
4
RCSB6
6
Rev. Pr G | Page 40 of 53
TCSB5
5
Non Audio
Preamble
3
RCSB5
5
TCSB4
4
RCSB4
4
Non Audio
Frame
2
TCSB3
3
RCSB3
3
Preliminary Technical Data
TCSB2
2
Non Audio
Subframe_A
1
RCSB2
2
TCSB1
1
RCSB1
1
Non Audio
Subframe_B
0
TCSB0
0
RCSB0
0