peb20532 Infineon Technologies Corporation, peb20532 Datasheet - Page 217

• Manufacturer Part Number: peb20532
• Description: 2 Channel Serial Optimized Communication Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
TIC
Transmit Immediate Character
On write access to this register, the ASYNC protocol engine will
automatically insert the character defined by bit field ’TIC’ into the
transmit data stream.
This happens
• immediately after write access to register TICR if the transmitter is in
• immediately after the character which is currently in transmission is
The TIC transmission is independent of in-band flow control. Thus the
TIC is sent out even if the transmitter is in ’XOFF’ state. However the
transmitter must be enabled via signal CTS (depending on bit ’FCTS’ in
register CCR1H).
The number of significant bits (starting with the LSB) depends on the
character length programmed in bit field ’CHL(1:0)’ in register CCR3L.
All character framing related settings in registers
bit, parity generation, number of stop bits) also apply to the TIC character
framing.
As long as the TIC character is not completely sent, status bit TIC
Execution (’TEC’) in status register
No further write access to register TICR is allowed until ’TEC’ status
indication is cleared by SEROCCO-M.
IDLE state (no other character is currently transmitted). The
transmitter returns to IDLE state after transmission of the TIC.
completed. After transmission of the TIC, the transmitter continues
with transmission of characters which are still stored in the transmit
FIFO. Thus the TIC is inserted into the data stream between the
characters provided via the transmit FIFO.
5-217
STARL
Register Description (TICR)
is set to ’1’ by SEROCCO-M.
CCR3L/CCR3H
(async mode)
PEB 20532
PEF 20532
2000-09-14
(start