qf4a512 ETC-unknow, qf4a512 Datasheet - Page 22

• Manufacturer Part Number: qf4a512
• Description: 4-channel Programmable Signal Converter Psc
• Manufacturer: ETC-unknow

8. FIR FILTERS
8.1 FIR Overview
Each channel features a 512-tap FIR which is used to define the precise filtering characteristics desired. The filtering characteristics of
each channel may be set independently may include any combination of the following types: lowpass, notched lowpass, highpass,
bandpass, dual bandpass, bandstop, and dual bandstop. Currently available filter algorithms include Parks-McClellan and Windowed
Sinc.
The Quickfilter Pro software allows the user to enter the filter characteristics required and see the predicted performance in terms of
frequency and impulse response. Once the desired performance has been attained, the configuration can be downloaded to the
QF4A512, and the actual hardware performance verified, by using the development kit. The device can be fed with a white noise
source (or other source as desired by the user) and the software can display an FFT of the QF4A512’s filter response.
The FIR coefficients are downloaded from EEPROM into RAM at power up (depending on the contents of the STARTUP register). The
output data from the FIRs is stored in data RAM, this data in turn is output from the SPI port when the device is run mode (see Section
9).
8.2 FIR Memory Locations
The memory locations for the control registers, coefficient and data RAM’s for each channel are shown in the following tables:
Table 3. Channel 1 - FIR Filter Address Information
0300h – 05FFh FIR_0_1_COEF_RAM FIR Coefficients
1000h – 10FFh FIR_0_0_DATA_RAM G & H Data memory
1400h – 17FFh FIR_0_1_DATA_RAM FIR filter Data Memory
Table 4. Channel 2 - FIR Filter Address Information
1800h – 1BFFh FIR_1_1_DATA_RAM FIR filter Data Memory
Table 5. Channel 3 - FIR Filter Address Information
1C00h – 1FFFh FIR_2_1_DATA_RAM FIR filter Data Memory
Table 6. Channel 4 - FIR Filter Address Information
0C00h – 0EFFh FIR_3_1_COEF_RAM FIR Coefficients
Note: Address space from 0F00h - 0FFFh and 2400h – 3FFFh is not used. If these locations are read they will return zeroes.
Rev C5, Jan 07
0100h – 017Fh FIR_0_0_COEF_RAM G & H coefficients
0180h – 01FFh FIR_1_0_COEF_RAM G & H coefficients
0600h – 08FFh FIR_1_1_COEF_RAM FIR Coefficients
1100h – 11FFh FIR_1_0_DATA_RAM G & H Data memory
0900h – 0BFFh FIR_2_1_COEF_RAM FIR Coefficients
0200h – 027Fh FIR_2_0_COEF_RAM G & H coefficients
1200h – 12FFh FIR_2_0_DATA_RAM G & H Data memory
0280h – 02FFh FIR_3_0_COEF_RAM G & H coefficients
1300h – 13FFh FIR_3_0_DATA_RAM G & H Data memory
2000h – 23FFh FIR_3_1_DATA_RAM FIR filter Data Memory
Address
Address
Address
Address
0030h
0060h
00C0h
0090h
CH1_PGA
CH2_PGA
CH3_PGA
CH4_PGA
Register Name
Register Name
Register Name
Register Name
Control Register. Enable FIR operation, set PGA gain.
Control Register. Enable FIR operation, set PGA gain.
Control Register. Enable FIR operation, set PGA gain.
Control Register. Enable FIR operation, set PGA gain.
Description
Description
Description
Description
PRELIMINARY
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QF4A512