sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 102
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sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
- Current page: 102 of 266
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4.7.7
The interrupt structure is shown in
interrupt set bit (in register ISS) can trigger the interrupt generation. The interrupt pulse
is generated independently from the interrupt flag in register IS. The interrupt flag can be
reset by SW by writing to the corresponding bit in register ISR.
If enabled by the related interrupt enable bit in register IEN, an interrupt pulse can be
generated at one of the four interrupt output lines of the module (length 2 clock cycles).
If more than one interrupt source is connected to the same interrupt node pointer (in
register INP), the requests are combined to one common line.
Figure 4-36
4.7.8
The CCU6 is disabled when the chip goes into the powerdown mode as describe in . Or
it can be individually disabled by setting CCUDIS in register PMCON1. This helps to
reduce current consumption in the normal, slow down and idle modes of operation if the
CCU6 is not utilized. Bit CCUST in register PMCON2 reflects the powerdown status of
CCU6.
User’s Manual
int_reset_SW
int_set_SW
int_enable
Interrupt Generation
int_event
Module Powerdown
Interrupt Generation
other interrupt sources
O
R
on the same INP
Figure
int_flag
4-58
4-36. The interrupt event or the corresponding
A
N
D
On-Chip Peripheral Components
O
R
INP
V 1.0, 2003-01
to I0
to I1
to I2
to I3
C868
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