sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 167

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sak-c868p-1rr

Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
5
5.1
The hardware reset function incorporated in the C868 allows for an easy automatic start-
up at a minimum of additional hardware and forces the controller to a predefined default
state. The hardware reset function can also be used during normal operation in order to
restart the device. This is particularly done when the power-down mode is to be
terminated.
Additional to the hardware reset, which is applied externally to the C868, there are three
internal reset sources, the watchdog timer, the brownout and the PLL. This chapter
deals only with the external hardware reset and brownout.
The reset input is an active low input. An internal Schmitt trigger is used at the input for
noise rejection. The RESET pin must be held low for at least tbd usec. But the CPU will
only exit from reset condition after the PLL lock had been detected.
During RESET at transition from low to high, C868 will go into normal mode if ALE/BSL
is high and bootstrap loading mode if ALE/BSL is low. A pullup or pulldown to V
recommended for pin ALE/BSL depending on the intended chipmode because when
reset is exited, ALE/BSL is set to output by default. TxD should have a pullup to V
and should not be stimulated externally during reset, as a logic low at this pin will cause
the chip to go into test mode if ALE/BSL is low.
At the RESET pin, a pullup resistor is connected to V
to ground to allow a power-up reset. After V
hold the voltage level at the reset pin for a specific time to effect a complete reset.
User’s Manual
Reset, Brownout and System Clock Operation
Hardware Reset Operation
Reset, Brownout and System Clock Operation
5-1
DDP
has been turned on, the capacitor must
DDP
and a capacitor is connected
V 1.0, 2003-01
DDP
C868
DDP
is

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