sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 217
sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
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Table 7-2
Interrupt
Group
0
1
2
3
4
5
1)
Within a column, the topmost interrupt is serviced first, then the second and the third,
when available. The interrupt groups are serviced from left to right of the table. A low-
priority interrupt can itself be interrupted by a higher-priority interrupt, but not by another
interrupt of the same or a lower priority. An interrupt of the highest priority level cannot
be interrupted by another interrupt source.
If two or more requests of different priority levels are received simultaneously, the
request of the highest priority is serviced first. If requests of the same priority level are
received simultaneously, an internal polling sequence determines which request is to be
serviced first. Thus, within each priority level there is a second priority structure which is
illustrated in table 7-10.
The “priority-within-level” structure is only used to resolve simultaneous requests of the
same priority level.
User’s Manual
Capture/compare has 10 interrupt sources channeled to the 4 interrupt nodes INP0..3. The 3 capture/
compare ports has 3 pairs of interrupt request flags, ICC60R, ICC60F, ICC61R, ICC61F, ICC62R, ICC62F.
The other flags are T12OM, T12PM, T13CM, T13PM, TRPF, WHE, CHE.
Priority Bits
of Interrupt
Group
IP1.0, IP0.0
IP1.1, IP0.1
IP1.2, IP0.2
IP1.3, IP0.3
IP1.4, IP0.4
IP1.5, IP0.5
Interrupt Source Structure
Interrupt Source Priority
High Priority
Priority
EXINT0
TF0
EXINT1
TF1
RI + TI
TF2+EXF2
IADC
EXINT2
EXINT3
7-33
INP0
INP1
INP2
INP3
1)
1)
1)
1)
Interrupt System
Low
V 1.0, 2003-01
Priority
High
Low
C868
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