sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 179
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sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
- Current page: 179 of 266
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6
The C868 offers enhanced fail save mechanisms, which allow an automatic recovery
from software upset or hardware failure :
a programmable watchdog timer (WDT), with variable time-out period from 12.8 s to
819.2 s at f
6.1
To protect the system against software failure, the user’s program has to clear this
watchdog within a previously programmed time period. lf the software fails to do this
periodical refresh of the watchdog timer, an internal reset will be initiated. The software
can be designed so that the watchdog times out if the program does not work properly.
lt also times out if a software error is based on hardware-related problems.
The watchdog timer in the C868 is a 16-bit timer, which is incremented by a count rate
of f
by-two or a divide-by-128 prescaler. The upper 8 bits of the Watchdog Timer can be
preset to a user-programmable value via a watchdog service access in order to vary the
watchdog expire time. The lower 8 bits are reset on each service access.
shows the block diagram of the watchdog timer unit.
Figure 6-1
6.1.1
The current count value of the Watchdog Timer is contained in the Watchdog Timer
Register WDT, which is a non-bitaddressable read-only register. The operation of the
Watchdog Timer is controlled by its bitaddressable Watchdog Timer Control Register
User’s Manual
f
SYS
SYS
/2 up to f
DISWDT
Fail Save Mechanism
Programmable Watchdog Timer
Register Definition of the Watchdog Timer
SYS
SYS
Block Diagram of the Programmable Watchdog Timer
= 40 MHz
/128. The machine clock of the C868 is divided by a prescaler, a divide-
1:128
1:2
.
WDTIN
MUX
6-1
WDT Low Byte
Control
WDT
Clear
WDT High Byte
WDTREL
Fail Save Mechanism
V 1.0, 2003-01
Figure 6-1
WDTRST
C868
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