at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 131

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

13.22 PSC Synchronization
13.22.1
7734M–AVR–03/10
Fault events in Autorun mode
Note : In AT90PWM81, this feature is not relevant and PRUN2, PARUN2 are stuck at zero.
2 or 3 PSC can be synchronized together. In this case, two waveform alignments are possible:
Figure 13-41. PSC Run Synchronization
If the PSCm has its PARUNn bit set, then it can start at the same time than PSCn-1.
PRUNn and PARUNn bits are located in PCTLn register.
139.
Note : Do not set the PARUNn bits on the three PSC at the same time.
Thanks to this feature, we can for example configure two PSC in slave mode (PARUNn = 1 / PRUNn = 0)
and one PSC in master mode (PARUNm = 0 / PRUNm = 0). This PSC master can start all PSC at the
same moment ( PRUNm = 1).
To complete this master/slave mechanism, fault event (input mode 7) is propagated from PSCn-1 to PSCn
and from PSCn to PSCn-1.
A PSC which propagate a Run signal to the following PSC stops this PSC when the Run signal is
deactivate.
• The waveforms are center aligned in the Center Aligned mode if master and slaves are all with the
• The waveforms are edge aligned in the 1, 2 or 4 ramp mode
same PSC period (which is the natural use).
PRUN0
PARUN0
PRUN1
PARUN1
PRUN2
PARUN2
SY0In
SY1In
SY2In
SY0Out
SY1Out
SY2Out
Run PSC0
Run PSC1
Run PSC2
See “PSC 2 Control Register – PCTL2” on page
PSC0
PSC1
PSC2
AT90PWM81
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