at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 96

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at90pwm81-16se

Manufacturer Part Number
at90pwm81-16se
Description
8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
12.8.1
96
AT90PWM81
Timer/Counter1 Control Register B – TCCR1B
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is activated,
the input from the Input Capture pin (ICP1) is filtered. The filter function requires four successive equal
valued samples of the ICP1 pin for changing its output. The Input Capture is therefore delayed by four
Oscillator cycles when the noise canceler is enabled.
• Bit 6 – ICES1: Input Capture Edge Select
This bit selects which edge on the Input Capture pin (ICP1) that is used to trigger a capture event. When
the ICES1 bit is written to zero, a falling (negative) edge is used as trigger, and when the ICES1 bit is
written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICES1 setting, the counter value is copied into the Input Cap-
ture Register (ICR1). The event will also set the Input Capture Flag (ICF1), and this can be used to cause
an Input Capture Interrupt, if this interrupt is enabled.
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the TCCR1A and
the TCCR1B Register), the ICP1 is disconnected and consequently the Input Capture function is disabled.
• Bit 5 – Reserved
• Bit 4 – WGM13: Waveform Generation Mode
See the table below for the modes definition
Table 12-1.
• Bit 3 – Reserved
• Bit 2:0 – CS12:0: Clock Select
Bit
Read/Write
Initial Value
Mode
12
0
WGM13
0
1
7
ICNC1
R/W
0
Waveform Generation Mode Bit Description
Timer/Counter Mode of
Operation
Normal
CTC
6
ICES1
R/W
0
5
-
R
0
4
WGM13
R/W
0
3
-
R
0
TOP
0xFFFF
ICR1
2
CS12
R/W
0
TOV1 Flag
Set on
MAX
MAX
1
CS11
R/W
0
0
CS10
R/W
0
7734M–AVR–03/10
TCCR1B

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