at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 220

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

18.8.4
18.8.4.1
220
AT90PWM81
ADC Result Data Registers – ADCH and ADCL
ADLAR = 0
In case of trig on PSCnASY event, there is no flag. So, if ADSSEN is reset, a conversion will start each
time the trig event appears and the previous conversion is completed ..
Table 18-6.
When an ADC conversion is complete, the conversion results are stored in these two result data registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the ADCH reg-
ister has also been read.
Consequently, in 10-bit configuration, the ADCL register must be read first before the ADCH.
Nevertheless, to work easily with only 8-bit precision, there is the possibility to left adjust the result
thanks to the ADLAR bit in the ADCSRA register. Like this, it is sufficient to only read ADCH to have
the conversion result.
Bit
Read/Write
Initial Value
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
7
-
ADC7
R
R
0
0
ADC Auto Trigger Source Selection
ADTS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
6
-
ADC6
R
R
0
0
ADTS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
-
ADC5
R
R
0
0
4
-
ADC4
R
R
0
0
ADTS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
-
ADC3
R
R
0
0
Description
Free Running Mode
Analog Comparator 1
External Interrupt Request 0
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSCRASY Event
PSC2ASY Event
Analog comparator 2
Analog comparator 3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
ADC2
2
-
R
R
0
0
1
ADC9
ADC1
R
R
0
0
0
ADC8
ADC0
R
R
0
0
7734M–AVR–03/10
ADCH
ADCL