at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 99

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

13. Power Stage Controller – (PSCn)
13.1
13.2
7734M–AVR–03/10
Features
Overview
The Power Stage Controller is a high performance waveform controller.
The AT90PWM81 includes one PSC2 block.
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Many register and bit references in this section are written in general form.
The purpose of a Power Stage Controller (PSC) is to control power modules on a board. It has two outputs
on PSCn and four outputs on PSC2.
These outputs can be used in various ways:
Each PSC has two inputs the purpose of which is to provide means to act directly on the generated
waveforms:
The PSC can be chained and synchronized to provide a configuration to drive three half bridges. Thanks
to this feature it is possible to generate a three phase waveforms for applications such as Asynchronous or
BLDC motor drive.
• A lower case “n” replaces the PSC number, in this case 2. However, when using the register or bit
• A lower case “x” replaces the PSC part , in this case A or B. However, when using the register or bit
• “Two Outputs” to drive a half bridge (lighting, DC motor ...)
• “One Output” to drive single power transistor (DC/DC converter, PFC, DC motor ...)
• “Four Outputs” in the case of PSC2 to drive a full bridge (lighting, DC motor ...)
• Current sensing regulation
• Zero crossing retriggering
• Demagnetization retriggering
• Fault input
PWM waveform generation function (2 complementary programmable outputs)
Dead time control
Standard mode up to 12 bit resolution
Frequency and pulse width Resolution Enhancement Mode (12 + 4 bits)
Frequency up to 64 Mhz
Conditional Waveform on External Events (Zero Crossing, Current Sensing ...)
All on chip PSC synchronization
ADC synchronization with digital delay register
Input Blanking
Overload protection function
Abnormality protection function, emergency input to force all outputs to high impedance or in inactive state
(fuse configurable)
Center aligned and edge aligned modes synchronization
Fast emergency stop by hardware
defines in a program, the precise form must be used, i.e., PSOC2 for accessing PSC 2 Synchro and
Output Configuration register and so on.
defines in a program, the precise form must be used, i.e., PFRC2A for accessing PSC n Fault/Retrigger
2 A Control register and so on.
AT90PWM81
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