c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 63

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c8051t617

Manufacturer Part Number
c8051t617
Description
Mixed Signal Byte-programmable Eprom Mcu
Manufacturer
Silicon Laboratories
Datasheet
The Comparator output can be polled in software, used as an interrupt source, and/or routed to a Port pin.
When routed to a Port pin, the Comparator output is available asynchronous or synchronous to the system
clock; the asynchronous output is available even in STOP mode (with no system clock active). When dis-
abled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic low state,
and its supply current falls to less than 100 nA. See Section “14.1. Priority Crossbar Decoder” on page 118
for details on configuring Comparator outputs via the digital Crossbar. Comparator inputs can be externally
driven from –0.25 V to (V
ifications are given in Table 7.1.
The Comparator response time may be configured in software via the CPTnMD registers (see SFR Defini-
tion 7.3 and SFR Definition 7.6). Selecting a longer response time reduces the Comparator supply current.
See Table 7.1 for complete timing and current consumption specifications.
CMX1N1
CMX1N0
CMX1P1
CMX1P0
P1.2
P1.6
P2.2
P2.6
P1.3
P1.7
P2.3
P2.7
Figure 7.2. Comparator1 Functional Block Diagram
DD
) + 0.25 V without damage or upset. The complete Comparator electrical spec-
CP1HYP1
CP1HYP0
CP1HYN1
CP1HYN0
CP1OUT
CP1RIF
CP1FIF
CP1EN
CP1 +
CP1 -
CP1MD1
CP1MD0
CP1RIE
CP1FIE
Rev. 0.3
+
-
GND
VDD
C8051T610/1/2/3/4/5/6/7
Decision
Reset
Tree
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
Rising-edge
CP1
Crossbar
Interrupt
Logic
Falling-edge
Interrupt
CP1
CP1A
CP1
CP1
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