mc9s08rd60fj Freescale Semiconductor, Inc, mc9s08rd60fj Datasheet - Page 108

• Manufacturer Part Number: mc9s08rd60fj
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Carrier Modulator Transmitter (CMT) Module
CMTDIV1:CMTDIV0 — CMT Clock Divide Prescaler
EXSPC — Extended Space Enable
BASE — Baseband Enable
FSK — FSK Mode Select
EOCIE — End of Cycle Interrupt Enable
108
The CMT clock divide prescaler causes the CMT to be clocked at the BUS CLOCK frequency, or the
BUS CLOCK frequency divided by 1, 2, 4, or 8. Because these bits are not double buffered, they
should not be changed during a transmission.
The EXSPC bit enables extended space operation.
When set, the BASE bit disables the carrier generator and forces the carrier output high for generation
of baseband protocols. When BASE is clear, the carrier generator is enabled and the carrier output
toggles at the frequency determined by values stored in the carrier data registers. See
Mode. This bit is cleared by reset. This bit is not double buffered and should not be written to during
a transmission.
The FSK bit enables FSK operation.
A CPU interrupt will be requested when EOCF is set if EOCIE is high.
1 = Extended space enabled
0 = Extended space disabled
1 = Baseband mode enabled
0 = Baseband mode disabled
1 = CMT operates in FSK mode
0 = CMT operates in time or baseband mode
1 = CPU interrupt enabled
0 = CPU interrupt disabled
CMTDIV1:CMTDIV0
Table 7-3 CMT Clock Divide Prescaler
00
01
10
11
MC9S08RC/RD/RE/RG
CMT Clock Divide
BUS CLOCK
BUS CLOCK
BUS CLOCK
BUS CLOCK
1
2
4
8
Freescale Semiconductor
7.5.2.2 Baseband