mc9s08rd60fj Freescale Semiconductor, Inc, mc9s08rd60fj Datasheet - Page 215

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mc9s08rd60fj

Manufacturer Part Number
mc9s08rd60fj
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
C.9 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
C.9.1 Control Timing
Freescale Semiconductor
Bus frequency (t
Real time interrupt internal oscillator
External reset pulse width
Reset low drive
Active background debug mode latch setup time
Active background debug mode latch hold time
IRQ pulse width
Port rise and fall time (load = 50 pF)
NOTES:
1. This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed
2. When any reset is initiated, internal circuitry drives the reset pin low for about 34 cycles of f
3. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may
4. Timing is shown with respect to 20% V
to override reset requests from internal sources.
level on the reset pin about 38 cycles later to distinguish external reset requests from internal requests.
or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
(2)
(3)
cyc
= 1/f
RESET PIN
Parameter
Bus
(1)
)
(4)
DD
Table C-9 Control Timing
Figure C-6 Reset Timing
and 80% V
MC9S08RC/RD/RE/RG
DD
levels. Temperature range –40 C to 85 C.
Symbol
t
Rise
t
t
t
MSSU
t
t
f
extrst
rstdrv
t
f
MSH
extrst
ILIH
Bus
RTI
, t
Fall
SoC Guide — MC9S08RG60/D Rev 1.10
1.5 t
1.5 t
34 t
Min
700
dc
25
25
cyc
cyc
cyc
Typical
3
Bus
and then samples the
Max
1300
8
Unit
MHz
Hz
ns
ns
ns
ns
ns
ns
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