mc9s08rd60fj Freescale Semiconductor, Inc, mc9s08rd60fj Datasheet - Page 127

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mc9s08rd60fj

Manufacturer Part Number
mc9s08rd60fj
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 10 Timer/PWM Module (TPM) Module
10.1 Introduction
The MC9S08RC/RD/RE/RG includes a timer/PWM (TPM) module that supports traditional input capture,
output compare, or buffered edge-aligned pulse-width modulation (PWM) on each channel. A control bit
in the TPM configures both channels in the timer to operate as center-aligned PWM functions. Timing
functions in the TPM are based on a 16-bit counter with prescaler and modulo features to control frequency
and range (period between overflows) of the time reference. This timing system is ideally suited for a wide
range of control applications. The MC9S08RC/RD/RE/RG devices do not have a separate fixed internal
clock source (XCLK). If the XCLK source is selected using the CLKSA and CLKSB control bits (see
Table
10.2 Features
Timer system features include:
Freescale Semiconductor
10-1), the TPM will use the BUSCLK.
Two separate channels:
– Each channel may be input capture, output compare, or buffered edge-aligned PWM
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
– Selectable polarity on PWM outputs
The TPM may be configured for buffered, center-aligned pulse-width modulation (CPWM) on both
channels
Clock source to prescaler for the TPM is selectable between the bus clock or an external pin:
– Prescale taps for divide by 1, 2, 4, 8, 16, 32, 64, or 128
– External clock input shared with TPM1CH0 timer channel pin
16-bit modulus register to control counter range
Timer system enable
One interrupt per channel plus terminal count interrupt
MC9S08RC/RD/RE/RG
SoC Guide — MC9S08RG60/D Rev 1.10
127

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