mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 449

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mc9s12xf512

Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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12.3
This section provides a detailed description of all registers accessible in the CGMIPLL.
12.3.1
Figure 12-2
12.3.2
This section describes in address order all the CGMIPLL registers and their individual bits.
12.3.2.1
The SYNR register controls the multiplication factor of the IPLL and selects the VCO frequency range.
Freescale Semiconductor
2. CGMTEST0, CGMTEST1 and CGMTEST2 registers are intended for factory test purposes only.
Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
RESERVE
Memory Map and Registers
CGMSYN
CGMREF
CGMFLG
CGMCTL
CGMTES
CGMTES
CGMTES
Name
Module Memory Map
Register Descriptions
gives an overview on all CGMIPLL registers.
T0
T1
T2
DV
R
D
CGMIPLL Synthesizer Register (CGMSYNR)
2
2
2
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
LOCKIE
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
MC9S12XF - Family Reference Manual, Rev.1.19
Figure 12-2. CGMIPLL Register Summary
= Unimplemented or Reserved
6
0
0
0
0
0
0
Chapter 12 Clock Generation Module using IPLL (CGMIPLL) Block Description
5
0
0
0
0
0
0
NOTE
LOCKIF
4
0
0
0
0
0
LOCK
DIV2
3
0
0
0
0
SYNDIV[5:0]
REFDIV[5:0]
FM1
2
0
0
0
0
0
FM0
1
0
0
0
0
0
UNLOCKF
PLLON
Bit 0
0
0
0
0
449

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