mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 496

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 13 FlexRay Communication Controller (FLEXRAY)
13.5.2.23 Protocol Status Register 3 (PSR3)
Write: Normal Mode
This register provides aggregated channel status information as an accrued status of channel activity for
all communication slots, regardless of whether they are assigned for transmission or subscribed for
reception. It provides accrued information for the symbol window, the NIT, and the wakeup status.
496
Module Base + 0x002E
Reset
CLKCORR-
FAILCNT
W
SBVA
SSEA
Field
R
MTA
3–0
6
5
4
15
0
0
Symbol Window Boundary Violation on Channel A — protocol related variable:
window on channel A
This status bit is set if there was some media activity on the FlexRay bus channel A at the start or at the end of
the symbol window.
0 No such event
1 Media activity at boundaries detected
Symbol Window Syntax Error on Channel A — protocol related variable:
on channel A
This status bit is set when a syntax error was detected during the symbol window on channel A.
0 No such event
1 Syntax error detected
Media Access Test Symbol MTS Received on Channel A — protocol related variable:
symbol window on channel A
This status bit is set if the Media Access Test Symbol MTS was received in the symbol window on channel A.
1 MTS symbol received
0 No such event
Clock Correction Failed Counter — protocol related variable:
This field provides the number of consecutive even/odd communication cycle pairs that have passed without
clock synchronization having performed an offset or a rate correction due to lack of synchronization frames. It is
not incremented when it has reached the configured value of either max_without_clock_correction_fatal or
max_without_clock_correction_passive as defined in the
FlexRay block resets this counter on a hard reset condition, when the protocol enters the
state, or when both the rate and offset correction terms have been calculated successfully.
14
0
0
WUB ABVB AACB ACEB ASEB AVFB
w1c
13
0
w1c
12
0
Table 13-29. PSR2 Field Descriptions (Sheet 2 of 2)
Figure 13-23. Protocol Status Register 3 (PSR3)
MC9S12XF - Family Reference Manual, Rev.1.19
w1c
11
0
w1c
Additional Reset: RUN Command
10
0
w1c
0
9
w1c
0
8
Description
0
0
7
Protocol Configuration Register 8
6
0
0
vClockCorrectionFailed
WUA ABVA AACA ACEA ASEA AVFA
w1c
0
5
vSS!SyntaxError
w1c
0
4
w1c
vSS!BViolation
0
3
Freescale Semiconductor
vSS!ValidMTS
POC:normal active
w1c
(PCR8). The
for symbol window
0
2
w1c
for symbol
1
0
for
w1c
0
0