mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 579

• Manufacturer Part Number: mc9s12xf512
• Description: S12x Microcontrollers 16-bit Automotive Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

13.6.6.4.4
The application provides the message data through the commit side. The transmission itself is executed
from the transmit side. The transfer of the message data from the commit side to the transmit side is done
by the Internal Message Transfer, which is described in
To transmit a message over the FlexRay bus, the application writes the message data into the message
buffer data field of the commit side and sets the commit bit CMT in the
Control, Status Registers
in
As indicated by
commit bit CMT only if the transmit message buffer is in one of the states HDis, HDisLck, or HLck. The
application can change the state of a message buffer if it issues the appropriate commands shown in
Table
bits.
13.6.6.4.5
The internal message transfer transfers the message data from the commit side to the transmit side. The
internal message transfer is implemented as the swapping of the content of the
Registers (MBIDXRn)
bit is cleared, the commit side interrupt flag MBIF is set, the transmit side CMT bit is set, and the transmit
side DVAL bit is cleared.
The conditions and the point in time when the internal message transfer is started are controlled by the
message buffer commit mode bit MCM in the
(MBCCSRn). The MCM bit configures the message buffer for either the streaming commit mode or the
immediate commit mode. A detailed description is given in
Commit
buffer enter one of the CCITx states. The internal message transfer is finished with the transition IE.
Streaming Commit Mode
The intention of the streaming commit mode is to ensure that each committed message is transmitted at
least once. The FlexRay block will not start the Internal Message Transfer for a message buffer as long as
the message data on the transmit side is not transmitted at least once.
Freescale Semiconductor
Section 13.6.3.1, “Individual Message
CCMa
State
Idle
Idle
13-107. The state change is indicated through the MBCCSRn.EDS and MBCCSRn.LCKS status
Mode. The Internal Message Transfer is triggered with the transition IS. Both sides of the message
Message Preparation
Internal Message Transfer
Table
TX > DSS
TX > STS
MA > SA
Priority
IS > HD
IS > HL
Table 13-109. Double Transmit Message Buffer Transition Priorities
13-105, the application shall write to the message buffer data field and change the
of the commit side and the transmit side. After the swapping, the commit side CMT
(MBCCSRn). The physical access to the message buffer data field is described
Internal Message Transfer Start > Message Buffer Disable
Internal Message Transfer Start > Message Buffer Lock
Message Available > Slot Assigned
Transmission Slot Start > Static Slot Start
Transmission Slot Start > Dynamic Slot Start
MC9S12XF - Family Reference Manual, Rev.1.19
Buffers”.
module vs. application
module internal
Message Buffer Configuration, Control, Status Registers
Section 13.6.6.4.5, “Internal Message Transfer
Chapter 13 FlexRay Communication Controller (FLEXRAY)
Streaming Commit Mode
Description
Message Buffer Configuration,
Message Buffer Index
and
Immediate
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