mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 829

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mc9s12xf512

Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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internal RAM and misaligned XGATE PRR accesses in emulation modes are the only type of access that
are able to produce LSTRB = ADDR0 = 1. This is summarized in
18.4.6
The XEBI does not support any user-controlled options for reducing power consumption.
18.4.6.1
The XEBI does not support any options for reducing power in run mode.
Power consumption is reduced in single-chip modes due to the absence of the external bus interface.
Operation in expanded modes results in a higher power consumption, however any unnecessary toggling
of external bus signals is reduced to the lowest indispensable activity by holding the previous states
between external accesses.
18.4.6.2
The XEBI does not support any options for reducing power in wait mode.
18.4.6.3
The XEBI will cease to function in stop mode.
18.5
This section describes the external bus interface usage and timing. Typical customer operating modes are
normal expanded mode and emulation modes, specifically to be used in emulator applications. Taking the
availability of the external wait feature into account the use cases are divided into four scenarios:
Freescale Semiconductor
Word write of data on DATA[15:0] at an even and even+1
address
Byte write of data on DATA[7:0] at an odd address
Byte write of data on DATA[15:8] at an even address
Word write at an odd and odd+1 internal RAM address
(misaligned — only in emulation modes)
Word read of data on DATA[15:0] at an even and even+1
address
Byte read of data on DATA[7:0] at an odd address
Byte read of data on DATA[15:8] at an even address
Word read at an odd and odd+1 internal RAM address
(misaligned - only in emulation modes)
Normal expanded mode
Initialization/Application Information
Low-Power Options
Run Mode
Wait Mode
Stop Mode
Table 18-19. Access in Emulation Modes and Special Test Mode
Access
MC9S12XF - Family Reference Manual, Rev.1.19
RW LSTRB ADDR0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Table
0
1
0
1
0
1
0
1
Chapter 18 External Bus Interface (S12XEBIV4)
Out
Out
Out data(odd+1) Out
I/O
18-19.
In
In
In
In
In
DATA[15:8]
data(odd+1)
data(addr)
data(even)
data(even)
data(even)
data(odd)
x
x
Out
Out
I/O
In
In
In
In
In
DATA[7:0]
data(even+1)
data(addr)
data(odd)
data(odd)
data(odd)
data(odd)
data(odd)
x
x
829

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