mc9s12xf512 Freescale Semiconductor, Inc, mc9s12xf512 Datasheet - Page 468
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mc9s12xf512
Manufacturer Part Number
mc9s12xf512
Description
S12x Microcontrollers 16-bit Automotive Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12XF512.pdf
(1306 pages)
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Chapter 13 FlexRay Communication Controller (FLEXRAY)
13.5.2
This section provides detailed descriptions of all registers in ascending address order, presented as 16-bit
wide entities
Table 13-4
468
FIELDNAME Identifies the field. Its presence in the read or write row indicates that it can be read or written.
Convention
0x00DC
0x00DE
0x01FC
0x009A
0x009C
0x009E
0x00A0
0x00FE
0x01FA
0x01FE
0x0092
0x0094
0x0096
0x0098
0x0100
0x0102
0x0104
0x0106
0x01F8
Offset
rwm
w1c
R*
...
...
...
provides a key for the register figures and register tables.
Register Descriptions
Depending on its placement in the read or write row, indicates that the bit is not readable or not writeable.
Reserved bit or field, will not be changed. Application must not write any value different from the reset value.
A read/write bit that may be modified by a hardware in some fashion other than by a reset.
Write one to clear. A flag bit that can be read, is cleared by writing a one, writing 0 has no effect.
Receive FIFO Message ID Acceptance Filter Mask Register (RFMIAFMR)
Message Buffer Configuration, Control, Status Register 31 (MBCCSR31)
Message Buffer Configuration, Control, Status Register 0 (MBCCSR0)
Receive FIFO Frame ID Rejection Filter Value Register (RFFIDRFVR)
Receive FIFO Frame ID Rejection Filter Mask Register (RFFIDRFMR)
Message Buffer Cycle Counter Filter Register 31 (MBCCFR31)
Receive FIFO Range Filter Configuration Register (RFRFCFR)
Last Dynamic Transmit Slot Channel A Register (LDTXSLAR)
Last Dynamic Transmit Slot Channel B Register (LDTXSLBR)
Message Buffer Cycle Counter Filter Register 0 (MBCCFR0)
Table 13-3. FlexRay Memory Map (Sheet 4 of 4)
Receive FIFO Range Filter Control Register (RFRFCTR)
Message Buffers Configuration, Control, Status
MC9S12XF - Family Reference Manual, Rev.1.19
Table 13-4. Register Access Conventions
Message Buffer Frame ID Register 31 (MBFIDR31)
Message Buffer Frame ID Register 0 (MBFIDR0)
Message Buffer Index Register 31 (MBIDXR31)
Message Buffer Index Register 0 (MBIDXR0)
Protocol Configuration Register 30 (PCR30)
Protocol Configuration Register 0 (PCR0)
Dynamic Segment Status
Protocol Configuration
Register Field Types
Reserved
Register
...
...
Description
Freescale Semiconductor
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
...
R
R
R
–
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