xr17v258 Exar Corporation, xr17v258 Datasheet - Page 20

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xr17v258

Manufacturer Part Number
xr17v258
Description
66mhz Pci Bus Octal Uart With Power Management Support
Manufacturer
Exar Corporation
Datasheet

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XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
The XR17V258 has a general purpose 16-bit timer/counter. The crystal/clock at the XTAL1 input or an external
clock at the TMRCK input pin can be selected as the clock source for the timer/counter. The timer can be set to
be a single-shot for a one-time event or re-triggerable for a periodic signal. An interrupt may be generated
when the timer times out and will show up as a Channel 0 interrupt (see
configuration registers [TIMERCNTL, TIMER, TIMELSB, TIMERMSB]. The TIMERCNTL register provides the
Timer commands such as start/stop, as shown in
optionally routed to the MPIO[0] pin. The block diagram of the Timer/Counter circuit is shown below:
TIMERMSB [31:24] and TIMERLSB [23:16]
The concatentaion of the 8-bit registers TIMERMSB and TIMERLSB forms a 16-bit value which decides the
time-out period of the Timer, per the following equation:
The least-significant bit of the timer is being bit [0] of the TIMERLSB with most-significant-bit being bit [7] in
TIMERMSB. Notice that these registers do not hold the current counter value when read. Default value is zero
(timer disabled) upon powerup and reset. The ’Reset Timer’ command does not have any effect on this
register.
TIMER [15:8] Reserved
1.6.2
Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10
F
IGURE
General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (
0
COM M ANDS
TIM ERCNTL
X
TIM ERM SB and TIM ERLSB
XX-XX-00-00)
6. T
Timer output frequency = Timer input clock / 16-bit Timer value
OSC. CLOCK
IMER
TIMERMSB Register
(16-bit Value)
TM RCK
/C
Single shot/Re-triggerable
Clock Select
Tim er Interrupt Enable/ Disable
OUNTER CIRCUIT
Start/Stop
Route/De-route to M PIO[0]
1
0
16-Bit Timer/Counter Programmable Registers
Bit-9 Bit-8
Tim er/Counter
Table 10
16-Bit
20
Bit-7
below. The time-out output of the Timer can also be
Tim er Interrupt
M PIOLVL[0]
Output
Tim er
Bit-6
1
0
Bit-5
TIMERLSB Register
Table 8
Bit-4
M PIO[0]
1
0
). It is controlled through 4
Bit-3
Tim er Interrupt
No Interrupt
Bit-2
xr
Bit-1 Bit-0
REV. 1.0.0
DEFAULT

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