xr17v258 Exar Corporation, xr17v258 Datasheet - Page 34

• Manufacturer Part Number: xr17v258
• Description: 66mhz Pci Bus Octal Uart With Power Management Support
• Manufacturer: Exar Corporation

XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
Each UART in the V258 includes the infrared encoder and decoder compatible to the IrDA (Infrared Data
Association) version 1.0. The input pin ENIR conveniently activates all 8 UART channels to start up in the
infrared mode. This global control pin enables the MCR bit [6] function in every UART channel register. After
power up or a reset, the software can overwrite MCR bit [6] if so desired. ENIR and MCR bit [6] also disable its
receiver while the transmitter is sending data. This prevents the echoed data from going to the receiver. The
global activation ENIR pin prevents the infrared emitter from turning on and drawing large amount of current
while the system is starting up. When the infrared feature is enabled, the transmit data outputs, TX[7:0], would
idle LOW. Likewise, the RX [7:0] inputs assume a LOW idle level.
The infrared encoder sends out a 3/16 of a bit wide pulse for each “0” bit in the transmit data stream. This
signal encoding reduces the on-time of the infrared LED, hence reduces the power consumption. See
Figure 13
F
4.3
IGURE
The local UART (UARTA) starts data transfer by asserting -RTSA# (1). RTSA# is normally connected to CTSB# (2) of
remote UART (UARTB). CTSB# allows its transmitter to send data (3). TXB data arrives and fills UARTA receive FIFO
(4). When RXA data fills up to its receive FIFO trigger level, UARTA activates its RXA data ready interrupt (5) and con-
tinues to receive and put data into its FIFO. If interrupt service latency is long and data is not being unloaded, UARTA
monitors its receive data fill level to match the upper threshold of RTS delay and de-assert RTSA# (6). CTSB# follows
(7) and request UARTB transmitter to suspend data transfer. UARTB stops or finishes sending the data bits in its trans-
mit shift register (8). When receive FIFO data in UARTA is unloaded to match the lower threshold of RTS delay (9),
UARTA re-asserts RTSA# (10), CTSB# recognizes the change (11) and restarts its transmitter and data flow again until
next receive FIFO trigger (12). This same event applies to the reverse direction when UARTA sends data to UARTB
with RTSB# and CTSA# controlling the data flow.
12. A
Infrared Mode
(RXA FIFO
CTSB#
RXA FIFO
Interrupt)
RTSA#
below.
TXB
INTA
Trigger Reached
UTO
Receiver FIFO
Trigger Level
Local UART
Transmitter
Auto CTS
Auto RTS
UARTA
Monitor
RTS/DTR
Data Starts
Receive
Data
Assert RTS# to Begin
1
AND
2
Transmission
Trigger Level
3
4
RX FIFO
CTS/DSR F
RTSA#
TXA
CTSA#
RXA
ON
ON
LOW
5
7
RTS High
Threshold
C
ONTROL
34
6
8
OFF
Suspend
O
OFF
PERATION
RTSB#
CTSB#
RTS Low
Threshold
RXB
TXB
Restart
9
10
11
Trigger Reached
Remote UART
ON
Trigger Level
Receiver FIFO
12
Auto CTS
Auto RTS
Transmitter
UARTB
Monitor
ON
Trigger Level
RX FIFO
xr
RTSCTS1
REV. 1.0.0