afs600 Actel Corporation, afs600 Datasheet - Page 125

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

Analog Configuration MUX (ACM)
The ACM is the interface between the FPGA, the Analog
Block configurations, and the real-time counter. Actel
Libero IDE will generate IP that will load and configure
the Analog Block via the ACM. However, users are not
limited to using the Libero IDE IP. This section provides a
detailed description of the ACM's register map, truth
tables for proper configuration of the Analog Block and
RTC, as well as timing waveforms so users can access and
control the ACM directly from their designs.
The Analog Block contains four 8-bit latches per Analog
Quad that are initialized through the ACM. These latches
Table 2-51 • ACM Address Decode Table for Analog Quad
ACMADDR [7:0] in Decimal
0
1
2
3
4
5
.
.
.
36
37
38
39
40
41
.
.
.
63
64
65
66
67
68
72
73
74
75
MATCHREG0 Match register bits 7:0
MATCHREG1 Match register bits 15:8
MATCHREG2 Match register bits 23:16
MATCHREG3 Match register bits 31:24
COUNTER0
COUNTER1
COUNTER2
COUNTER3
COUNTER4
Name
AQ0
AQ0
AQ0
AQ0
AQ1
AQ8
AQ9
AQ9
AQ9
AQ9
–
.
.
.
.
.
.
–
Byte 0
Byte 1
Byte 2
Byte 3
Byte 0
Byte 3
Byte 0
Byte 1
Byte 2
Byte 3
Undefined
Undefined
Undefined
Counter bits 7:0
Counter bits 15:8
Counter bits 23:16
Counter bits 31:24
Counter bits 39:32
A d v an c ed v1 . 4
act as configuration bits for Analog Quads. The ACM
block runs from the core voltage supply (1.5 V).
Access to the ACM is achieved via 8-bit address and data
busses with enables. The pin list is provided in
on page
maximum of 10 MHz, more than sufficient to handle the
low-bandwidth requirements of configuring the Analog
Block and the RTC (sub-block of the Analog Block).
Table 2-51
to the corresponding Analog Quad and configuration
byte for that quad.
Description
.
.
.
2-73. The ACM clock speed is limited to a
decodes the ACM address space and maps it
Actel Fusion Programmable System Chips
Associated Peripheral
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
RTC
RTC
RTC
RTC
RTC
RTC
RTC
RTC
RTC
RTC
Table 2-36
2-111