afs600 Actel Corporation, afs600 Datasheet - Page 203

• Manufacturer Part Number: afs600
• Description: Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
• Manufacturer: Actel Corporation

Differential I/O Characteristics
Configuration of the I/O modules as a differential pair is
handled by the Actel Designer software when the user
instantiates a differential I/O macro in the design.
Differential I/Os can also be used in conjunction with the
embedded Input Register (InReg), Output Register
(OutReg), Enable Register (EnReg), and Double Data
Rate
bidirectional I/Os or tristates with these standards.
LVDS
Low-Voltage Differential Signal (ANSI/TIA/EIA-644) is a
high-speed differential I/O standard. It requires that one
Figure 2-126 • LVDS Circuit Diagram and Board-Level Implementation
Table 2-165 • Minimum and Maximum DC Input and Output Levels
Table 2-166 • AC Waveforms, Measuring Points, and Capacitive Loads
DC Parameter
V
V
V
I
I
V
I
I
V
V
V
V
Notes:
1. ±5%
2. Differential input voltage = ±350 mV
Input LOW (V)
1.075
Note: *Measuring point = V
OL
OH
IL
IH
CCI
OL
OH
I
ODIFF
OCM
ICM
IDIFF
4
4
3
3
OUTBUF_LVDS
(DDR).
However,
Supply Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
Input Voltage
Input LOW Voltage
Output HIGH Voltage
Differential Output Voltage
Output Common Mode Voltage
Input Common Mode Voltage
Input Differential Voltage
FPGA
trip
there
. See
Table 2-87 on page 2-151
N
P
Description
is
no
Bourns Part Number: CAT16-LV4F12
165 Ω
165 Ω
Input HIGH (V)
support
1.325
A d v an c ed v1 . 4
for
for a complete table of trip points.
140 Ω
data bit be carried through two signal lines, so two pins
are needed. It also requires external resistor termination.
The full implementation of the LVDS transmitter and
receiver is shown in an example in
building blocks of the LVDS transmitter–receiver are one
transmitter macro, one receiver macro, three board
resistors at the transmitter end, and one resistor at the
receiver end. The values for the three driver resistors are
different from those used in the LVPECL implementation
because the output standard specifications are different.
ZO = 50 Ω
ZO = 50 Ω
2.375
Min.
1.125
0.65
0.65
1.25
0.05
250
100
0.9
0
Measuring Point* (V)
100 Ω
Actel Fusion Programmable System Chips
Cross point
1.075
1.425
Typ.
0.91
0.91
1.25
1.25
350
350
2.5
N
P
FPGA
+
–
Max.
2.625
2.925
1.375
1.16
1.16
1.25
2.35
450
1.6
10
10
Figure
INBUF_LVDS
V
REF
(typ.) (V)
2-126. The
–
Units
mA
mA
mV
mV
μA
μA
V
V
V
V
V
V
2-189