ak4566vn AKM Semiconductor, Inc., ak4566vn Datasheet - Page 24

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ak4566vn

Manufacturer Part Number
ak4566vn
Description
20bit Stereo Codec With Built-in Ipga & Hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
3) DAC
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) HPLMT, HPRMT and PMVCM bits should be changed to “1” after PDN pin goes to “H”.
(3) PMDAC and PMMO bits should be changed to “1” after HPLMT, HPRMT and PMVCM bits are changed to “1”.
(4) External clocks (MCLK, BICK, LRCK) are needed to operate DAC. When PMDAC= “0”, these clocks can be
(5) When PMMO bit is changed to “1”, click noise is output from MOUT pin.
(6) Analog output corresponding to digital input has the group delay (GD) of 16.8/fs(=381µs@fs=44.1kHz).
(7) ATS bit sets transition time of digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
REV 0.5
stopped. MOUT buffer can operate without these clocks.
Power Supply
PDN pin
HPLMT,
PMVCM bit
Clock Input
PMDAC bit
DAC Internal
SDTI pin
PMMO bit
ATTL/R7-0 bit
MMUTE,
ATTM3-0 bit
MOUT pin
HPRMT bit
State
MOUT
PD(Power-down)
10H(MUTE)
(1) >150ns
(Hi-Z)
Don’t care
Figure 19. Power-up/down sequence of DAC and MOUT
00H(MUTE)
(3) >0
(2)
>0
(4)
(5)
AKM CONFIDENTIAL
(6) GD (7) 1061/fs
Normal Operation
FFH(0dB)
- 24 -
(6) (7)
0FH(0dB)
00H(MUTE)
(5)
Don’t care
Don’t care
(Hi-Z)
PD
(5)
Normal Operation
(6) (7)
FFH(0dB)
[AK4566]
2002/2

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