ak4566vn AKM Semiconductor, Inc., ak4566vn Datasheet - Page 33

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ak4566vn

Manufacturer Part Number
ak4566vn
Description
20bit Stereo Codec With Built-in Ipga & Hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
REV 0.5
Addr
06H
MCKPD: MCLK Input Buffer Control
MCKAC: MCLK Input Mode Select
DFS: Sampling Speed Mode Select (Table 2)
DIF1-0: Audio Data Interface Format
HPM: Mono Output Select of Headphone
ATS: Digital attenuator transition time setting (Table 15)
Register Name
Mode Control
Default
Default: “10” (Mode 2)
0: Normal Operation (Default)
1: Mono. (L+R)/2 signal from DAC is output to Lch and Rch of headphone.
Setting of HPM bit is enabled only at DACL=DACR= “1”.
0: Enable (Default)
1: Disable
When MCLK input with AC coupling is stopped, MCKPD bit should be set to “1”.
0: CMOS input (Default)
1: AC coupling input
DACL
0
1
Table 15. Transition time between set values of ATT7-0 bits
ATS
0
1
HPM
MCKAC
Table 14. Mono Output Select of Headphone
x
0
1
D7
0
0dB to MUTE
AKM CONFIDENTIAL
1061/fs
7424/fs
MCKPD
(Note. Rch is same.)
D6
0
Output (L+R)/2 from DAC
ATT speed
Output from Lch of DAC
No output from DAC
HPL pin Output
- 33 -
D5
0
0
1 step
29/fs
4/fs
ATS
D4
0
Default
HPM
D3
0
Default
DIF1
D2
1
DIF0
D1
0
[AK4566]
2002/2
DFS
D0
0

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