ak4566vn AKM Semiconductor, Inc., ak4566vn Datasheet - Page 28

• Manufacturer Part Number: ak4566vn
• Description: 20bit Stereo Codec With Built-in Ipga & Hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
n Register Definitions
REV 0.5
Addr
00H
PMVCM: Power Management for VCOM Block
PMADC: Power Management for IPGA and ADC Blocks
PMDAC: Power Management for DAC Blocks
PMHPL: Power Management for Lch of Headphone Amp
PMHPR: Power Management for Rch of Headphone Amp
PMMO: Power Management for Mono Output
HPLMT: Mute for Lch of Headphone Amp
HPLMT: Mute for Rch of Headphone Amp
All blocks can be powered-down by setting PDN pin to “L” regardless of register values setup. All blocks can be also
powered-down by setting all power management bits to “0”. In this case, control register values are held.
Register Name
Power Management
Default
0: Power OFF (Default)
1: Power ON
0: Power OFF (Default)
1: Power ON
MCLK should be present when PMADC bit= “1”.
0: Power OFF (Default)
1: Power ON
When PMDAC bit is changed from “0” to “1”, DAC is powered-up to the current register values (ATT
value, sampling rate, etc).
0: Power OFF (Default). HPL pin becomes HVSS(0V).
1: Power ON
0: Power OFF (Default). HPR pin becomes HVSS(0V).
1: Power ON
0: Power OFF (Default) MOUT pin becomes Hi-Z.
1: Power ON
0: Normal operation (Default). MUTET pin is connected to VCOM pin internally.
1: Mute. MUTET pin is connected to HPL pin internally.
0: Normal operation (Default). MUTET pin is connected to VCOM pin internally.
1: Mute. MUTET pin is connected to HPR pin internally.
HPLMT
HPRMT
0
0
1
1
D7
0
Table 5. MUTET internal connection
AKM CONFIDENTIAL
HPLMT
HPRMT
D6
0
0
1
0
1
PMMO
- 28 -
D5
0
Connected to HPL,HPR
Connected to VCOM
Connected to HPR
Connected to HPL
PMHPR
MUTET
D4
0
PMHPL
D3
0
PMDAC
D2
0
PMADC
D1
0
[AK4566]
PMVCM
2002/2
D0
0