le79128 Zarlink Semiconductor, le79128 Datasheet - Page 10

• Manufacturer Part Number: le79128
• Description: Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

Note:
1.
2.
3.
RST
WDT_OUT
RSVD
NC
Pin Name
Logic state after reset.
Used as an input, but pin has I/O capability.
Used as an output, but pin has I/O capability.
Z = No state driven, high impedance.
1 = Logic high.
0 = Logic low.
Keeper = Kept in current state, not allowed to float.
Pull-up = Internal pull-up provided.
Pull-down = Internal pull-down provided.
CONF
Table 7. Le79128 VCP Device Pin Description (Control Pins)
Table 8. Configuration Assignments (CONF
2
000
001
010
011
100
101
110
111
- CONF
TQFP Pin #
97, 116, 117
48, 60, 61,
11, 14, 47,
16, 93
0
21
18
LBGA Pin #
A4, A12, B4,
B12, E1, F1,
G5, G7, G8,
H5, H6, H7,
E5, E6, E7,
L8, M7, M8
E8, F5, F8,
H8, J10
H1
J1
Host Interface
Parallel
Parallel
Parallel
Parallel
Serial
Output
Type
Input
Microsemi Corporation - CMPG
Reset
2
Le79128
Z
Z
- CONF
1
10
Parallel Data Width
Active Low reset input returns chip to default state. RST pulse width
must be a minimum of 100 ns. If a capacitor to DVSS is used on this
pin, as required by some applications, then the minimum RST pulse
width is increased to 100 µs. This pin must be externally pulled up.
Active Low, open-drain output from Watchdog timer function. Triggers
on watchdog timer expiration and power on reset. The minimum
pulse width for WDT_OUT is 1 ms. This pin must be shorted to RST
if the watchdog function is desired to reset the VCP or system.
Reserved. These pins are internally connected. Pins must be left
floating.
No connect. These pins are not internally connected. Pins can be
used as tie points.
0
)
Reserved
NA
16
16
8
8
Parallel Read/Write Strobes
Description
Preliminary Data Sheet
Combined
Combined
Separate
Separate
NA