le79128 Zarlink Semiconductor, le79128 Datasheet - Page 46

no-image

le79128

Manufacturer Part Number
le79128
Description
Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
Manufacturer
Zarlink Semiconductor
Datasheet
DEBUG INTERFACE
This port is for debug use only. If debug of VCP operation becomes necessary, Microsemi may require access to this port.
Two Debug port access methods are presented.
The board can be laid out with a population option debug header and with population option pull-up and pull-down resistors. This
interface is detailed in Figure 25. The 14-pin header pins should be spaced 2.54 mm (100 mils) row to row and 2.54 mm (100
mils) column to column.
An alternate approach is to simply bring TCK, TMS, TDI, TDO, and TRST pins out to test points with TRST tied to digital ground
through a 1 KΩ resistor. This will allow easy access if it becomes necessary to jumper to the Debug port.
TIMING DIAGRAM TEST POINTS
DVDD = PLL_VDD = 3.3 V +5%, PLL_VSS = DVSS = 0 V.
2.4 V
0.4 V
Le79128
VCP
TRST
TDO
TMS
TCK
TDI
Figure 25. VCP Debug Port - Optional Header Interface
10K
R1
R3
1K
Figure 26. Timing Diagram Test Points
+3.3 V
2.0 V
0.8 V
Microsemi Corporation - CMPG
Le79128
R2
R4
33
0
POINTS
46
TEST
11
13
Header
1
3
5
7
9
Debug
10
12
14
2
4
6
8
R5
0
2.0 V
0.8 V
Preliminary Data Sheet

Related parts for le79128