le79128 Zarlink Semiconductor, le79128 Datasheet - Page 29

• Manufacturer Part Number: le79128
• Description: Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
• Manufacturer: Zarlink Semiconductor

6. The address pin is used as a command word demarcation. The command interface is reset during a write operation when
GPI Connections to an External Host
The external interface connection diagrams for two different GPI configurations is shown in
the address pin is High. (Note that the command interface is not reset during a read operation when the address pin is High.)
This ensures that the command and data sequences between the external processor and the VCP device will be interpreted
properly. If a previous command has completed, the next word will be interpreted as a command regardless of PADDR. Refer
to
Table 14
Table 14. GPI Interface Access Types
Address
0
0
1
1
for a list of the GPI access modes.
CMDPROG:
INT:
PWAIT:
Figure 6. GPI Connections Using Combined Read/Write and Data Strobes
External Processor
External Processor
Figure 5. GPI Connections Using Separate Read and Write Strobes
Read or Write
Data_Strobe
Chip_Select
Chip_Select
Read/Write
Bus[N:0]
Bus[N:0]
Address
Address
0
1
0
1
Write
Read
Wait
Wait
Command in progress.
INT logic state.
PWAIT logic state.
Microsemi Corporation - CMPG
write data
read data
write command
read status
Le79128
8 or 16
8 or 16
29
Access Type
PCS
PWR
PRD
PWAIT
PADDR
PD[N:0] (N = 7 or 15)
PCS
PRD/WR
PDS
PWAIT
PADDR
PD[N:0] (N = 7 or 15)
VCP device
VCP device
(optional)
(optional)
Figure 5
Preliminary Data Sheet
and
Figure
6.