le79128 Zarlink Semiconductor, le79128 Datasheet - Page 11

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le79128

Manufacturer Part Number
le79128
Description
Next Generation Voiceedge™ Control Processor Next Generation Carrier Chipset Ngcc
Manufacturer
Zarlink Semiconductor
Datasheet
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Stresses greater than those listed under
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability.
Package Assembly
The green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. Refer to IPC/JEDEC J-Std-020 for recommended peak soldering temperature and solder reflow
temperature profile.
Operating Ranges
Microsemi guarantees the performance of this device over commercial (0 ºC to 70 ºC) and industrial (-40 ºC to 85 ºC) temperature
ranges by conducting electrical characterization over each range and by conducting a production test with single insertion
coupled to periodic sampling. These characterization and test procedures comply with the Telcordia GR-357-CORE Generic
Requirements for Assuring the Reliability of Components Used in Telecommunications Equipment.
Environmental Ranges
Electrical Ranges
Note: +3.3 V supply should ramp and reach a steady final value before +1.8 V supply ramps. RST should be held low until both supplies have
reached final values. If +3.3 V supply and +1.8 V supply ramps and sequence can not be guaranteed, both RST and TRST should be held low
until both supplies have reached final values. In the case where +3.3 V supply and +1.8 V supply ramps and sequence can not be guaranteed,
TRST is typically tied low via a 1 K
Storage Temperature
Ambient Temperature, under Bias
Ambient relative humidity (non condensing)
PLL_VDD with respect to PLL_VSS or DVSS
DVDD with respect to PLL_VSS or DVSS
VDD18 with respect to DVSS or PLL_VSS
Latch up immunity (any pin)
Any other pin with respect to DVSS or PLL_VSS
ESD Immunity (Human Body Model)
Ambient Temperature
Ambient Relative Humidity
DVDD
PLL_VDD
VDD18
DVSS
PLL_VSS
Digital pins with respect to DVSS
resistor to ground.
Absolute Maximum Ratings
Microsemi Corporation - CMPG
Le79128
11
–40 ºC to +85 ºC
15 % to 85 %
+3.3 V ± 5% (see note)
+3.3 V ± 5%, DVDD ± 50 mV (see note)
+1.8 V ± 5% (see note)
0 V
DVSS ±10 mV
DVSS to +3.465 V
can cause permanent device failure. Functionality at or
–60 ºC
–40 ºC
5 % to 95 %
–0.4 V to +4.0 V
–0.4 V to +4.0 V
–0.4 V to +1.98 V
±100 mA
–0.4 V to (DVDD + 0.4 V)
JESD22 Class 1C compliant
T
T
A
A
Preliminary Data Sheet
+125 ºC
+85 ºC

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