r8a66597 Renesas Electronics Corporation., r8a66597 Datasheet - Page 117

• Manufacturer Part Number: r8a66597
• Description: Assp Usb2.0 2 Port Host/1 Port Peripheral Controller
• Manufacturer: Renesas Electronics Corporation.

R8A66597FP/DFP/BG
R e v 1 . 0 1
NT_N Pin
INTL Setting
Edge Sense
(”INTL=0”)
Level Sense
(”INTL=1”)
Interrupt factor 1
Interrupt factor 2
(1) Edge Sense
(2) Level Sense
*1) When factor 1 interrupt enable bit is disabled instead of factor 1 being cleared, the negate period is not generated.
Interrupt factor 1
Interrupt factor 2
Table 3.8 shows the controller INT_N pin operation. If various interrupt factors are generated, the INT_N pin output
method can be set through the SOFCFG register INTL bit. Also, the INT_N pin active state can be set by the PINCFG
register INTA bit. Set the INT_N operation to meet user system specifications.
Active Level: low when “INTA=0”, high when “INTA=1”
NT_N Pin
O c t 1 7 , 2 0 0 8
INT_N Pin
Operation
Figure 3.5 INT_N Pin Operating Diagram (example when “INTA=0” is set)
Generate
factor 1
Generate
factor 1
(interrupt status is cleared or interrupt enable
bit is set to “disabled”).
Asserted until interrupt factor is released
Asserted until interrupt factor is released.
p a g e 1 1 7 o f 1 8 3
For one type of interrupt factor
Generate
factor 2
Generate
factor 2
Table 3.8 INT_N Pin Operation
Clear factor 1
Clear
Negate period
factor
1
1
one interrupt factor is released.
released.
Negated for 32 clock period at 48MHz when
Asserted until all interrupt factors are
For various types of interrupts factors
Clear factor 2
Clear factor 2