cn8223 Mindspeed Technologies, cn8223 Datasheet - Page 138
cn8223
Manufacturer Part Number
cn8223
Description
Atm Transmitter/receiver With Utopia Interface
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8223.pdf
(161 pages)
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4.0 Electrical and Mechanical Specifications
4.3 Timing
4.3.1 Microprocessor Interface Timing
Table 4-2. Microprocessor Interface Timing
4-4
Name
t prclk
t csph
t aspr
t cspr
t pras
t wpr
t odd
t odv
t pdd
t pdv
t prh
t dpr
t prd
t odz
t pdz
t apr
t odi
t pdi
t prl
Processor Clock Period
Processor Clock Pulse Width High
Processor Clock Pulse Width Low
Address Strobe Setup to Processor Clock Rising Edge
Address Setup to Processor Clock Rising Edge
Chip Select Setup to Processor Clock Rising Edge
Chip Select to Processor Clock Rising Edge Hold Time
Write/Read Control Setup to Processor Clock Rising Edge
Address Strobe Hold after Processor Clock Rising Edge
Data Setup to Processor Clock Rising Edge (write cycle)
Data Hold after Processor Clock Rising Edge (write cycle)
Output Enable Low to Data Bus Driven (read cycle)
Output Enable Low to Data Bus Valid (read cycle)
Output Enable High to Data Bus Invalid (read cycle)
Output Enable High to Data Bus High-Z (read cycle)
PRCLK High to Data Bus Driven (read cycle, OE~ low)
PRCLK High to Data Bus Valid (read cycle, OE~ low)
PRCLK high to Data Bus Invalid (read cycle, OE~ low)
PRCLK High to Data Bus High-Z (read cycle, OE~ low)
4.3 Timing
This section includes timing diagrams and descriptions for the CN8223.
Table 4-2
the microprocessor interface. All times are in nanoseconds.
Description
and
Figure 4-1
Conexant
display the timing requirements and characteristics of
ATM Transmitter/Receiver with UTOPIA Interface
t prh + 2 ns
Min
1.0
3.0
1.5
1.6
1.3
1.4
3.5
3.6
3.2
3.2
30
10
10
4
8
1
1
4
2X Cell Rate
t prl – 4 ns
Max
11.0
11.0
10.0
10.0
6.0
6.0
4.9
5.1
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100046D
CN8223
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