SST89E554 SST [Silicon Storage Technology, Inc], SST89E554 Datasheet - Page 17

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SST89E554

Manufacturer Part Number
SST89E554
Description
FlashFlex51 MCU
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet

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FlashFlex51 MCU
SST89E564 / SST89V564 / SST89E554 / SST89V554
Preliminary Specifications
SuperFlash Status Register (SFST) (Read Only Register)
SuperFlash Configuration Register (SFCF)
SuperFlash Command Register (SFCM)
©2001 Silicon Storage Technology, Inc.
Location
Location
Location
0B6H
0B1H
0B2H
Symbol
SECD1
SECD2
SECD3
FLASH_BUSYFlash operation completion polling bit.
Symbol
IAPEN
SWR
BSEL
Symbol
FIE
FCM[6:0]
SECD1
7
7
-
FIE
7
SECD2
FCM6
IAPEN
Function
Security bit 1.
Security bit 2.
Security bit 3.
Please refer to Table 4-6 for security lock options.
1: Device is busy with flash operation.
0: Device has fully completed the last command.
Function
Enable IAP operation
0: IAP commands are disabled
1: IAP commands are enabled
Software Reset
See “9.2 Software Reset” on page 43
Program memory block switching bit
See Figures 3-1 and 3-2.
Function
Flash Interrupt Enable.
0: INT1# is not reassigned.
1: INT1# is re-assigned to signal IAP operation completion.
Flash operation command
000_1011b
000_1101b
000_1100b
000_1110b
000_1111b
000_0011b
000_0101b
000_1001b
All other combinations are not implemented, and reserved for future use.
1. Byte-Verify has a single machine cycle latency and will not generate any INT1# interrupt regardless of FIE.
6
6
6
External INT1# interrupts are ignored.
FCM5
SECD3
5
5
5
-
Sector-Erase
Block-Erase
Byte-Verify
Byte-Program
Prog-SB1
Prog-SB2
Prog-SB3
Prog-SC0
FCM4
4
4
4
-
-
1
17
FCM3
3
3
3
-
-
FCM2
FLASH_BUSY
2
2
-
2
FCM1
1
SWR
1
1
-
FCM0
0
BSEL
0
0
-
S71181-03-000 9/01
Reset Value
00000000b
Reset Value
Reset Value
xxxxx0xxb
x0xxxxxxb
384

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