SST89E554 SST [Silicon Storage Technology, Inc], SST89E554 Datasheet - Page 33

• Manufacturer Part Number: SST89E554
• Description: FlashFlex51 MCU
• Manufacturer: SST [Silicon Storage Technology, Inc]

FlashFlex51 MCU
SST89E564 / SST89V564 / SST89E554 / SST89V554
Preliminary Specifications
4.2 In-Application Programming Mode
The device offers either 72 or 40 KByte of In-Application
Programmable flash memory. During In-Application Pro-
gramming, the CPU of the microcontroller enters IAP
Mode. The two blocks of flash memory allow the CPU to
execute user code from one block, while the other is being
erased or reprogrammed concurrently. The CPU may also
fetch code from an external memory while all internal flash
is being reprogrammed. The mailbox registers (SFST,
SFCM, SFAL, SFAH, SFDT and SFCF) located in the Spe-
cial Function Register (SFR), control and monitor the
device’s erase and program process.
Table 4-6 outlines the commands and their associated
mailbox register settings.
4.2.1 In-Application Programming Mode Clock
Source
During IAP Mode, both the CPU core and the flash control-
ler unit are driven off the external clock. However, an inter-
nal oscillator will provide timing references for Program and
Erase operations. The internal oscillator is only turned on
when required, and is turned off as soon as the flash oper-
ation is completed.
4.2.2 Memory Bank Selection for In-Application
Programming Mode
With the addressing range limited to 16 bit, only 64 KByte
of program address space is “visible” at any one time. As
shown in Table 4-4, Bank Selection (the configuration of
EA# and SFCF[1:0]), allows Block 1 memory to be overlaid
on the lowest 8 KByte of Block 0 memory, making Block 1
reachable. The same concept is employed to allow both
Block 0 and Block 1 flash to be accessible to IAP opera-
tions. Code from a block that is not visible may not be used
TABLE
©2001 Silicon Storage Technology, Inc.
1. No operation is performed because code from one block may not program the same originating block
EA#
1
1
1
1
1
0
0
0
4-4: IAP A
SFCF[1:0]
01, 10, 11
01, 10, 11
01, 10, 11
DDRESS
00
00
00
00
00
R
ESOLUTION FOR
Address of IAP Inst.
>= 2000H (Block 0)
>= 2000H (Block 0)
< 2000H (Block 1)
From external
From external
From external
Any (Block 0)
Any (Block 0)
SST89E564/SST89V564
33
as a source to program another address. However, a block
that is not “visible” may be programmed by code from the
other block through mailbox registers.
The device allows IAP code in one block of memory to pro-
gram the other block of memory, but may not program any
location in the same block. If an IAP operation originates
physically from Block 0, the target of this operation is implic-
itly defined to be in Block 1. If the IAP operation originates
physically from Block 1, then the target address is implicitly
defined to be in Block 0. If the IAP operation originates from
External program space, then, the target will depend on the
address and the state of Bank Select.
4.2.3 IAP Enable Bit
The IAP Enable Bit, SFCF[6], enables In-Application Pro-
gramming mode. Until this bit is set all flash programming
IAP commands will be ignored.
4.2.4 In-Application Programming Mode Commands
All of the following commands can only be initiated in the
IAP Mode. In all situations, writing the control byte to the
SFCM register will initiate all of the operations. All com-
mands will not be enabled if the security locks are enabled
on the selected memory block.
The Program command is for programming new data into
the memory array. The portion of the memory array to be
programmed should be in the erased state, FFH. If the
memory is not erased, it should first be erased with an
appropriate Erase command. Warning: Do not attempt to
write (program or erase) to a block that the code is cur-
rently fetching from. This will cause unpredictable pro-
gram behavior and may corrupt program data.
The Block-Erase command erases all bytes in one of the
two memory blocks. The selection of the memory block to
be erased is determined by the source of Block-Erase
Command, as defined in Table 4-4.
>= 2000H (Block 0)
>= 2000H (Block 0)
>= 2000H (Block 0)
< 2000H (Block 1)
< 2000H (Block 1)
< 2000H (Block 1)
Target Address
Any (Block 0)
Any (Block 0)
Block Being Programmed
Block 1
Block 0
Block 1
Block 0
Block 1
Block 0
None
None
S71181-03-000 9/01
1
1
T4-4.5 384
384