vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet - Page 127

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vsc055xkm-01

Manufacturer Part Number
vsc055xkm-01
Description
Enhanced I?c Backplane Controller
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
VSC055-01
Data Sheet
Table 27. Clock Control
Table 28. Interrupt
Table 29. Multiple Device Synchronization
Pin Name
Pin Name
Pin Name
SYNCEN
CKSEL2
CKSEL1
CKSEL0
SYNC#
INT#
Pin Number
Pin Number
Pin Number
19
18
17
24
20
21
Bidirectional
Open-drain
Open-drain
output
Input
Input
I/O
I/O
I/O
Pin Description
Interrupt
This pin can be used to signal the microcontroller that an event has
occurred on an I/O pin that is configured as an input or a special function
event has occurred. It can be wire ORed with other open-drain outputs to
provide a single interrupt input source.
Pin Description
Synchronization Control
This pin provides an internal or external clock synchronization
mechanism when the SYNCEN pin is tied HIGH. It can be connected to
the SYNC# pin of other VSC055-01 devices or can be used
independently to synchronize internally.
When enabled, all devices re-synchronize their internal clock dividers to
the first device that pulls this pin LOW. The synchronization pulse causes
all devices to clear their internal dividers and ensures that devices on
different two-wire serial busses have synchronized LED flashing.
The Clock Select Control register provides additional programmability to
determine the appropriate re-synchronization timing. An external 10 kΩ
resistor should be connected to this pin if the function is enabled. If not
enabled, a weak internal pull-up will maintain a high level.
Synchronization Enable Input
This pin enables the Synchronization Control feature. When tied to V
Synchronization Control is disabled. When tied to V
Control is enabled. When enabled, additional control is available in the
Clock Select Control register.
Pin Description
Clock Select
These three pins determine the input frequency of the clock or crystal
that is connected to the VSC055-01 on the OSCI and OSCO pins. These
pins also enable or disable the internal system clock divider and adjust
the flash rate and fan tach dividers to maintain the proper internal clock
rates.
127 of 133
DD
, Synchronization
January 2008
Revision 4.1
SS
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