vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet - Page 57
vsc055xkm-01
Manufacturer Part Number
vsc055xkm-01
Description
Enhanced I?c Backplane Controller
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.VSC055XKM-01.pdf
(133 pages)
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VSC055-01
Data Sheet
3.2.49 45h: Fan Speed Count Overflow 5 (FSCO5)
3.2.50 46h: Fan Speed Current Count 5 (FSCC5)
The following table shows the bit assignments for the Fan Speed Count Overflow 5 register. This register
functions same the Fan Speed Count Overflow 0 register except it affects the P2.5 pin.
The following table shows the bit assignments for the Fan Speed Current Count 5 register. This register
functions the same as Fan Speed Current Count 0 register except it affects the P2.5 pin.
Register Name:
Address:
Reset Value:
Bit
7:0
Register Name:
Address:
Reset Value:
Bit
7:0
Bit Label
FSCO7-0
Bit Label
FSCC7-0
FSCO5
45h
0000_0000b
FSCC5
46h
0000_0000b
Access
R/W
Access
R
Description
Fan Speed Count Overflow
These eight bits are compared to the 8-bit fan speed counter. If the counter
exceeds this value, an interrupt is generated. This register should be loaded
prior to setting the FSCEN bit in the FSC5 register to avoid generating
unintentional interrupts.
The overflow count value can be determined using the following equation,
where FF% is equal to the percentage of nominal RPM, which constitutes a fan
failure:
Based on the above equation, a divisor of 8, and a detected fan failure at 70%
of nominal RPM, the fan speed monitoring logic can support a low-end nominal
RPM of 850. High-end RPM values are basically unlimited; however, counter
resolution is diminished above 8000 RPM.
Description
These eight bits, when enabled by setting the FSCEN bit in the FSC5 register,
provide the user with an accurate binary fan speed count value that can be
used to determine the current RPM value of the fan. A minimum of one
complete revolution of the fan is required to generate an accurate fan speed
count value. The following equation can be used to determine the current RPM
value of the fan:
When the result of a read of this register is 00h, an accurate fan speed count
value is not generated, indicating that the fan has not completed a minimum of
one revolution.
When the result of a read of this register is FFh, the fan is rotating very slowly
or there are no tachometer pulses present.
When operating in a polled mode, with the FSIEN bit reset in the FSC5 register,
this register is automatically updated with an accurate fan speed count once
per revolution of the fan.
When operating in an Interrupt mode with the FSIEN bit set in the FSC5
register, this register is automatically updated with an accurate fan speed
count, once per revolution of the fan until an interrupt is generated. After the
interrupt is generated, the value remains stable until the interrupt is cleared.
When the interrupt is cleared, this register is also be cleared, indicating that a
valid RPM value is in the process of being generated.
Decimal overflow count value = (1,200,000) / (RPM × divisor × FF%)
RPM = (1,200,000)/(Decimal count value × divisor)
57 of 133
January 2008
Revision 4.1
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