vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet - Page 94

• Manufacturer Part Number: vsc055xkm-01
• Description: Enhanced I?c Backplane Controller
• Manufacturer: Maxim Integrated Products, Inc.

Revision 4.1
January 2008
Bit
4:2
1
0
Bit Label
FS2-0
DD
GPD
Access
R/W
R/W
R/W
Description
Function Select
These three bits, along with the PTE, DD, and GPD bits, determine the
function of each I/O pin.
When configured as an output, the FS2-0 bits determine the rate at which the
high current drive I/O toggles, providing a simple mechanism for flashing
LEDs. The DD and GPD bits can be used to drive each I/O individually and to
take the place of the byte wide controls found in the DD and GPD registers.
Note that the DD bit is always de-asserted to configure the I/O as an output.
Asserting the DD bit tri-states the I/O and effectively configures the I/O as an
input. The six bits allow the user to select one of seven flash rates or eight
user-programmable pulse trains, as well as to drive the LED both on and off.
The output can be enabled to drive in an open-source (output drives to V
with an external pull-down resistor) or open-drain (output drives to V
external pull-up) configuration when using the flashing mechanism. For
available combinations to drive an LED, see
When configured as an input, the DD bit is asserted. These bits determine the
type of I/O pin edge transition that generates an interrupt condition. Transition
detectors within the device filter the changes observed at the I/O pin and
determine if a valid transition has occurred. If a valid transition occurs, the
INT# pin asserts and a binary value equal to the address of this register
appears in the BCIS register. For available input edge combinations, see
Table 6,
Note: When configuring an I/O pin from an output to an input with interrupt
enabled, it is recommended that the data direction change and interrupt
enabling be accomplished with separate register write operations. This
guarantees that any I/O transition that occurs as a result of the data direction
change, which may rely on the weak internal pull-up resistor, does not
generate an unexpected interrupt.
Data Direction
This bit determines the direction of the data flow through the I/O pin.
To enable the respective I/O pin as an input, set the appropriate bit.
To enable the respective I/O pin as an output, reset the appropriate bit.
Each I/O pin can be individually configured as a true bidirectional function.
To implement an open-drain or open-source function, set or reset the
appropriate data bit using the data direction bit as the programmed data
value.
After a reset or power on, these bits are set to a binary 1, enabling the
I/O as an input with weak pull-up.
General-Purpose Data
When the I/O pin is enabled as an output, writing this bit determines the data
value that is present on the corresponding I/O pin.
If the I/O pin is enabled as an input, reading this register bit represents the
current voltage applied to the pin. At no time does this bit directly represent
the value latched into the data register.
If the pin is enabled as an input and there is no signal applied, a weak internal
pull-up resistor holds the pin at a binary 1.
After a reset or power on, this register bit is set to a binary 1; however, the
value returned from a register read is the level applied to the pin since each
pin is an input by default.
94 of 133
page 81.
Table 5,
page 80.
VSC055-01
Data Sheet
SS
with an
DD