ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 184

• Manufacturer Part Number: ST20-C1
• Description: Instruction Set Reference Manual
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

The justification of this is as follows. If the depth of both expressions is less than the
number of registers available ( r ), then there is no need to store the result of the first
evaluation in a temporary variable. The deeper expression is evaluated first to ensure
that the operation evaluates in the least number of stack registers. If this were not
done then the total depth requirement would have to be incremented due to the extra
location for storing the result of the first e valuation. If both expression depths are as
great as r , then a local variable ( temp ) must be used to store the result of the first
expression. It is again better to evaluate the expression with the larger depth if
possible, because this minimizes the number of local variables required. If only one of
the expressions is as great as r , then provided that expression is evaluated first, there
is no need to store its result in a local variable.
In the cases where a temporary variable temp is required to hold the value of the first
expression in the evaluation of e1 op e2 , then that variable can be used as a
temporary variable in the evaluation of the first e xpression. Also a temporary variable
used in the evaluation of the first expression and not used to hold its result can be
used in the evaluation of second expression.
The code sequence
at (*) in the above algorithm, can be optimized further to
removing the execution of the rev instruction. But be aware that the latter uses an
extra stack register, and so there is trade-off here between evaluation depth and code
size.
C.4
The three registers of the evaluation stack are used to hold operands of instructions.
Evaluation of an operand or parameter may involve the use of more than one register.
Care is needed when evaluating such operands to ensure that the first oper and to be
loaded is not pushed off the bottom of the evaluation stack by the evaluation of later
operands. The processor does not detect evaluation stack overflow.
Three registers are available for loading the first operand, two registers for the second
and one for the third. Consequently, the instructions are designed so that Creg holds
the operand which, on average, is the most complex, and Areg the operand which is
the least complex.
In some cases, it is necessar y to evaluate the Areg and Breg operands in advance,
and to store the results in temporary variables. This can sometimes be avoided using
the reverse instruction. Any of the following sequences may be used to load the
operands A , B and C into Areg, Breg and Creg respectively.
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}
(e2; e1; rev; op)
(e1; e2; op)
Loading sequence
}
}