st20-gp6 STMicroelectronics, st20-gp6 Datasheet

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st20-gp6

Manufacturer Part Number
st20-gp6
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
FEATURES
October 2004
Application specific features
GPS performance
Enhanced 32-bit VL-RISC CPU - C2 core
64 Kbytes on-chip SRAM
128 Kbytes on-chip ROM
Programmable memory interface
Programmable UART (ASC)
Parallel I/O
Vectored interrupt subsystem
Diagnostic control unit
Power management
Professional toolset support
Technology
100 pin PQFP package
JTAG Test Access Port
12 channel GPS correlation DSP hardware,
ST20 CPU (for control and position
calculations) and memory on one chip
no TCXO required
RTCA-SC159 / WAAS / EGNOS supported
accuracy
- stand alone with SA on <100m, SA off <30m
- differential <1m
- surveying <1cm
time to first fix
- autonomous start 90s
- cold start 45s
- warm start 7s
- obscuration 1s
16/33/50 MHz processor clock
25 MIPS at 33 MHz
fast integer/bit operations
4 separately configurable regions
8/16-bits wide
support for mixed memory
2 cycle external access
low power operation
power down modes
ANSI C compiler/link driver and libraries
Debugging/profiling and simulation tools
Static clocked 50 MHz design
3.3 V, sub micron technology
®
Figure 1. Package
Table 1. Order Codes
Figure 2. Block Diagram
APPLICATIONS
Global Positioning System (GPS) receivers
Car navigation systems
Fleet management systems
Time reference for telecom systems
ST20GP6X33S
Part Number
12 channel GPS
hardware DSP
clock/calendar
Programmable
128K optional
mask ROM
Real time
controller
interface
memory
SRAM
power
radio
GPS
Low
64K
GPS PROCESSOR
PQFP100
communications
2 UART (ASC)
input/output
access port
control unit
Diagnostic
controller
Interrupt
ST20-GP6
Parallel
Serial
ST20
CPU
Test
ST20-GP6
PQFP100
Package
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Rev. 2
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