ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 64

• Manufacturer Part Number: ST20-C1
• Description: Instruction Set Reference Manual
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

5.6 Scaling
However if the bits are not all equal, then an error has occurred. If the most significant
bit (bit 47) is zero then the overall result is positive, so the error is overflow. If the most
significant bit is 1 then the o verall result is negative, so the error is underflow. The
appropriate status register bit ( overflow or underflow ) is set accordingly, and the final
value is taken from Table 5.6.
5.6.6
The result of a biquad is always short (16-bits). The saturation test is from bit 38
upwards, and the overflow / underflo w flags are set as required. Note the initial value of
the overflow / underflo w flags is not taken into account. If a saturation error occurs, the
appropriate ShortMode value from Table 5.6 is used. If no error occurs, the scaling is:
5.6.7
There are four exceptional values based on whether the result is to be delivered as a
ShortMode (Q15) or LongMode (Q31) value, and whether the error was overflow or
underflow:
Note that in all cases the final value is placed in a 32-bit register (Areg).
5.6.8
biquad
The biquad instruction takes 11 cycles to execute, assuming single cycle memory
accesses. The ST20-C1 cannot be interrupted during this period.
smacloop
A smacloop of n steps takes n+4 cycles to complete, assuming single cycle memory
accesses.
The ST20-C1 cannot be interrupted during this period, which may be up to about 8
microseconds (for single cycle memory and an operating frequency of 33 Mhz). The
user may split a long multiply accumulate into a set of shorter ones passing the inter-
mediate accumulator value from one to the next. This will reduce interrupt latency, but
loses some numerical accuracy in that within a single smacloop intermediate values
are held to 48 bits of precision, while values passed from one smacloop to another
have at most 30 bits of precision (and are saturated).
64/205
Post-scaling and saturation - biquad
arithmetic right shift by 23 places
truncate to low 32 bits
Error: load exceptional value
Performance and interrupts
ShortMode
LongMode
mac_mode
Table 5.6 Exceptional values
7FFFFFFF
00007FFF
Overflo w
Underflo w
FFFF8000
80000000