ST18-AU1 STMICROELECTRONICS [STMicroelectronics], ST18-AU1 Datasheet - Page 29

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ST18-AU1

Manufacturer Part Number
ST18-AU1
Description
SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
6
6.1 Input buffer
The input buffer is single port memory mapped on the Y space. Taking into account the
requirements for AC3 decoding and SPDIF transmitter, its size is 2048 words (16-bit). It Is
software defined and may be dynamically sized. Buffer overflow detection is provided.
The D950 reads the buffer using its circular addressing mode of operation.
The DMA controller cycles through the buffer for write word by word, using a cycle stealing
mechanism: 3 D950 cycles are needed for each 16-bit word transfer.
When the SPDIF transmitter is enabled, another DMA channel is assigned to retrieving
encoded samples.
6.2 Output buffer
The output buffer is single port memory mapped on the X space.
For 2 channel and 6 channel PCM output, the size of the output buffer is software defined and
can be dynamically sized.
The D950 cycles through the buffer for write by using its circular addressing mode of operation.
The DMA controller cycles through the buffer for read of one sample at a time (2 or 3 words,
depending on samples format), using a cycle stealing mechanism.
In 2 channel output mode, one DMA channel is used.
In 6 channel output mode, three DMA channels are used.
The DMA channel used must operate on “Level” mode.
Buffer underflow detection can be performed using on-chip dedicated resources.
6.2.1 Input and output buffer registers
BUFCR: Buffer control register
All bits are cleared on reset.
Bit
EN_BUF
OVF_INBUF
15
-
14
-
INPUT AND OUTPUT BUFFERS
13
-
12
-
11
-
10
-
Function
Enable input/output buffer logic
Input buffer overflow
UDF_OUT
0
1
BUF_IEN
9
INBUFOVF= ‘0’
INBUFOVF=INBUF_FULL
OVF_INB
UF_IEN
8
7
-
6
-
5
-
4
-
3
-
UDF_
mod
2
OVF_IN
BUF
1
ST18-AU1
EN_B
UF
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0

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