ST18-AU1 STMICROELECTRONICS [STMicroelectronics], ST18-AU1 Datasheet - Page 9

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ST18-AU1

Manufacturer Part Number
ST18-AU1
Description
SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Table 2.4
Table 2.5
Pin name
EXTAL0
XTAL0
EXTAL1
XTAL1
CLK0
CLK0_MODE
CLK1
CLK1_MODE
PLL_MODE
CLKOUT
INCYCLE
SCLK
MCLK_MODE
Pin name
HDA
HCL
HSAS
Clocks (13 pins)
I
2
C Host interface (3 pins)
Type
Type
I/O
I/O
/O
O
O
O
O
I
I
I
I
I
I
I
I
I
Clock0 mode select input.
Clock1 mode select input.
PLL mode select input
Description
Oscillator0 input. DSP PLL.
Oscillator0 output. Nominal oscillator frequency is 27 MHz.
Oscillator1 input. Audio PLL
Oscillator1 output. Nominal oscillator frequency is 27 MHz.
Direct clock input for D950 core.
When low, select output of DSP PLL for DSP Clock In
When high, select CLK0 (bypass DSP PLL) for DSP Clock In
Direct audio clock input.
When low, select output of audio PLL for audio clock
When high, select CLK1 (bypass audio PLL) for DSP Clock In
When low, select oscillator 1 for audio PLL
When high, select oscillator 0 for audio PLL
Output clock (at input clock/2 frequency).
Instruction cycle.
Asserted high for 1 CLKOUT cycle at the beginning of instruction cycle.
External audio clock/audio clock prescaler output
SCLK mode select input
When low, SCLK = output (internal audio master clock from clock prescaler)
When high, SCLK = input (external audio master clock)
Description
I
I
Slave address select
2
2
C Data input/output (open drain output).
C Clock input/output (open drain output).
ST18-AU1
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