ST18-AU1 STMICROELECTRONICS [STMicroelectronics], ST18-AU1 Datasheet - Page 60
![no-image](/images/no-image-200.jpg)
ST18-AU1
Manufacturer Part Number
ST18-AU1
Description
SIX-CHANNEL DOLBY AC3/MPEG2 AUDIO DECODER
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST18-AU1.pdf
(87 pages)
- Current page: 60 of 87
- Download datasheet (497Kb)
ST18-AU1
16.1 D950Core registers
PCDR
The Port Control Direction register defines the data direction of each port pin. After reset,
PCDR default value is 0 (Port pins are configured as inputs)
PCSR
The Port Control Sensitivity register defines sensitivity of each port pin. After reset, PCSR
default value is 0 (Port pins are configured as level-sensitive).
60/87
Register
BX
MX
BY
MY
POR
PIR
PCDR
PCSR
PPR
Bit
PiD
Bits 8 - 15
Bit
PiS
Bits 8 - 15
15
15
-
-
14
14
-
-
13
13
Function
Port pin direction
RESERVED (read: undefined, write: don’t care)
Function
Port pin sensitivity
RESERVED (read: undefined, write: don’t care)
-
-
Function
Modulo base address for X-memory space
Modulo maximum address for X-memory space
Modulo base address for Y-memory space
Modulo maximum address for Y-memory space
Port Output Register - 8LSB are significant, 8MSB are undefined when reading
Port Input Register
Port Control Direction Register
Port Control Sensitivity Register
Program Page Register
0: Input port pin (default)
1: Output port pin
0: Level sensitive (default)
1: Edge sensitive
12
12
-
-
11
11
-
-
10
10
-
-
9
9
-
-
8
8
-
-
P7D P6D P5D P4D P3D P2D P1D P0D
P7S P6S P5S P4S P3S P2S P1S P0S
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
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